SK100E111

The SK10E/100E111 is a low skew 1-to-9 differential driver designed with clock distribution in mind. It accepts one signal input which can be either differential or singleended if the VBB output is used. The signal is fanned out to 9 identical differential outputs. An enable input of SK10E/100E111 is also provided. A HIGH disables the device by forcing all Q outputs LOW and all Q* outputs HIGH.

The SK10E/100E111 is specifically designed, modeled, and produced with low skew as the key goal. Optimal design and layout serve to minimize gate-to-gate skew withindevice, and characterization of SK10E/100E111 is used to determine process control limits that ensure consistent tpd distributions  from lot to lot. The net result is a dependable, guaranteed low skew device.

To ensure that the tight skew specification is met, it is necessary that both sides of the differential output are terminated into 50 , even if only one side is being used. In most applications, all nine differential pairs of SK10E/100E111 will be used and therefore terminated. In the case where fewer than nine pairs are used, it is necessary to terminate at least the output pairs on the same package side (i.e. sharing the same VCCO) as the pair(s) being used on that side in order to maintain minimum skew. Failure to  o this will result in small degradations of propagation  delay (on the order of 1020ps) of the output(s)of SK10E/100E111 being used which, while not being catastrophic to most designs, will mean a loss of skew margin.