SED1330FBA

The SED1330FBA is one member of the SED1330F series.It has the following features including Text,graphics and combined text/graphics display modes;Three overlapping screens in graphics mode; 640×256 pixel LCD panel display resolution;Programmable cursor control;Smooth horizontal and vertical scrolling of all or part of the display;1/2-duty to 1/256-duty LCD drive;Up to 64 Kbytes of external static RAM frame buffer memory;Internal character generator;160, 5 ×7 pixel characters in internal maskprogrammed character generator ROM;Up to 64, 8×16 pixel characters in external character generator RAM.

The SED1330FBA is a family of versatile LCD controller ICs that can display text and graphics on a medium size LCD panel. The software is compatible amongall three chips. The SED1330F can display layered text and graphics, scroll the display in any direction and partition the display into multiple screens.The SED1330F stores text, character codes and bit-mapped graphics data in external frame buffer memory.Display controller functions include transferring data from the controlling microprocessor to the buffer memory, reading memory data, converting data to display pixels and generating timing signals for the buffer memory, TV monitor and LCD panel.The SED1330F has an internal character generator with 160, 5 ´ 7 pixel characters in internal mask ROM. The character generators support up to 64, 8×16 pixel characters in external character generator RAM and up to 256, 8×16 pixel characters in external character generator ROM.

Places the SED1330FBA system in standby mode. This command has no parameter bytes. At least one blank frame after receiving this command, the SED1330F halts all internal operations, including the oscillator,and enters the sleep mode. Blank data is sent to the X-drivers, and the Y-drivers have their bias supplies turned off by the YDIS signal. Using the YDIS signal to disable the Y-drivers guards against any spurious displays.The internal registers of the SED1330F maintain their values during the sleep mode. The display memory control pins maintain their logic levels to ensure that the display memory is not corrupted.