SCG2500

The SCG2500 is a mixed-signal phase lock loop generating CMOS outputs from an intrinsically low jitter voltage controlled crystal oscillator.

The SCG2500 can lock to one of two possible input reference frequencies at 8 kHz which is selectable using one input select pin.

Further features include an alarm output to indicate Loss of Reference, LOR, or Loss of Lock, LOL. If only one of the references is lost, the unit will disable its phase detector and will signal an alarm, but will not switch reference automatically. If both references are lost, the SCG2500 will enter a Free Run state which will guarantee a 20 ppm accurate output. Additionally, the Free Run mode may be entered manually by applying a high signal to the Force Free Run pin. If the unit is in Free Run mode, the Free Run status pin will be high.

All outputs, except the Oscillator Output, may be put into the tri-state high impedance condition for external testing purposes by applying a high signal to the Reset/ Tri-State pin.

The filtered 8 kHz is derived from the oscillator output. The offset between the filtered output and the reference input will change with each reference rearrangement.

The package maximum dimensions are .780" x .830" x .35" on a six layer FR4 board with surface mount pins.

Parts are assembled using high temperature solder to withstand surface mount reflow process.