Features: • Fast rise and fall times (20ns typical with 3000pf load)• 20ns max. Propagation delay (BG going low)• Adaptive/programmable shoot-through protection• Wide input voltage range (4.5-25V)• Programmable delay between MOSFET's• Power saving asynchronous m...
SC1405: Features: • Fast rise and fall times (20ns typical with 3000pf load)• 20ns max. Propagation delay (BG going low)• Adaptive/programmable shoot-through protection• Wide input v...
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• Fast rise and fall times (20ns typical with 3000pf load)
• 20ns max. Propagation delay (BG going low)
• Adaptive/programmable shoot-through protection
• Wide input voltage range (4.5-25V)
• Programmable delay between MOSFET's
• Power saving asynchronous mode control
• Output overvoltage protection/overtemp shutdown
• Under-Voltage lock-out and power ready signal
• Less than 10A stand-by current (EN=low)
• Power ready output signal
• High Density/Fast transient power supplies
• Motor Drives/Class-D amps
• High frequency (to 1.2 MHz) operation allows use of small inductors and low cost caps in place of electrolytics
• Portable computers
Parameter | Symbol | Conditions | Maximum | Units |
V CC Supply Voltage | VMAX5V | 7 | V | |
BST to GND | VMAXBST-PGND | 30 | V | |
BST to GND | VMAXBST-DRN | 7 | V | |
DRN to PGND | VMAXDRN-PGN | 25 | V | |
DRN to PGND Pulse | VMAXOVP_S-PGND | t PULSE <100ns | 10 | V |
Input Pin | CO | -0.3 to 7.3 | V | |
Continuous Power Dissipation | Pd | Tamb = 25°C, TJ = 125°C Tcase = 25°C, TJ = 125°C |
0.66 2.56 |
W |
Thermal Impedance Junction to Case | JC | 40 | °C/W | |
Thermal Impedance Junction to Ambient | JA | 150 | °C/W | |
Operating Temperature Range | TJ | 0 to +125 | °C | |
Storage Temperature Range | TSTG | -65 to +150 | °C | |
Lead Temperature (Soldering) 10 sec | TLEAD | 300 | °C |
The SC1405 is a Dual-MOSFET Driver with an internal Overlap Protection Circuit to prevent shoot-through from VIN to GND in the main switching and synchronous MOSFET's. Each driver is capable of driving a 3000pF load in 20ns rise/fall time and has ULTRAFAST propagation delay from input transition to the gate of the power FET's. The Overlap Protection circuit ensures that the second FET does not turn on until the top FET source has reached a voltage low enough to prevent shoot-through. The delay between the bottom gate going low to the top gate transitioning to high is externally programmable via a capacitor for optimal reduction of switching losses at the operating frequency. The bottom FET may be disabled at light loads by keeping S_MOD low to trigger asynchronous operation, thus saving the bottom FET's gate drive current and inductor ripple current. An internal voltage reference allows threshold adjustment for an Output Over-Voltage protection circuitry, independent of the PWM feedback loop. Under-Voltage-Lock-Out circuit is included to guarantee that both driver outputs are low when the 5V logic level is less than or equal to 4.4V (typ) at supply ramp up (4.35V at supply ramp down). A CMOS output provides status indication of the 5V supply. A low enable input places the IC in stand-by mode thereby reducing supply current to less than 10A. SC1405 is offered in a high pitch (.025" lead spacing) TSSOP package.