Features: • Low phase noise• Low power• Fully programmable main divider• Internal fractional spurious compensation• Hardware and software power down• Split supply for VDD and VDDCPApplication• 3501300 MHz wireless equipment• Cellular phones• Po...
SA7016: Features: • Low phase noise• Low power• Fully programmable main divider• Internal fractional spurious compensation• Hardware and software power down• Split supply...
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SYMBOL | PARAMETER | MIN. | MAX. | UNIT |
VDD | Digital supply voltage | 0.3 | +5.5 | V |
VDDCP | Analog supply voltage | 0.3 | +5.5 | V |
VDDCPVDD | Difference in voltage between VDDCP and VDD (VDDCP VDD) | 0.3 | +2.8 | V |
Vn | Voltage at pins 1, 2, 5, 6, 11 to 16 | 0.3 | VDD + 0.3 | V |
V1 | Voltage at pin 8, 9 | 0.3 | VDDCP+ 0.3 | V |
VGND | Difference in voltage between GNDCP and GND (these pins should be connected together) |
0.3 | +0.3 | V |
Tstg | Storage temperature | 55 | +125 | |
Tamb | Operating ambient temperature | 40 | +85 | |
Tj | Maximum junction temperature | 150 | |
The SA7016 BICMOS device integrates programmable dividers, charge pumps and a phase comparator to implement a
phase-locked loop. The SA7016 is designed to operate from 3 NiCd cells, in pocket phones, with low current and nominal 3 V supplies.
The synthesizer SA7016 operates at VCO input frequencies up to 1.3 GHz. The synthesizer has fully programmable main and reference dividers. All divider ratios are supplied via a 3-wire serial programming bus.
Separate power and ground pins of SA7016 are provided to the analog and digital circuits. The ground leads should be externally short-circuited to prevent large currents flowing across the die and thus causing damage. VDDCP must be greater than or equal to VDD.
The charge pump current (gain)SA7016 is set by an external resistance at the RSET pin. Only passive loop filters could be used; the charge pump operates within a wide voltage compliance range to provide a wider tuning range.