S70GL01GN00

Storage Temperature, Plastic Packages. . . . . . . . .  . 65°C to +150°C
Ambient Temperature with Power Applied. . . . . . . . .65°C to +125°C
Voltage with Respect to Ground:
       V_CC 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to +4.0 V
       V_IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to +4.0 V
       A9, OE#, and A_CC 2 . . . . . . . . . . . . . . . . . . . . . .  .0.5 V to +12.5 V
       All other pins 1 . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to V_CC + 0.5V
       Output Short Circuit Current 3 . . . . . . . . . . . . . . . . . . . . . . . 200 mA

Notes:
1. Minimum DC voltage on input or I/Os is 0.5 V. During voltage transitions, inputs or I/ Os may overshoot V_SS to 2.0 V for periods of up to 20 ns. See Figure 7, on page 66. Maximum DC voltage on input or I/Os is V_CC + 0.5 V. During voltage transitions, input or I/O pins may overshoot to V_CC + 2.0 V for periods up to 20 ns. See Figure 8, on page 66.
2. Minimum DC input voltage on pins A9, OE#, and ACC is 0.5 V. During voltage transitions, A9, OE#, and ACC may overshoot V_SS to 2.0 V for periods of up to 20 ns. See Figure 7, on page 66. Maximum DC input voltage on pin A9, OE#, and ACC is +12.5 V which may overshoot to +14.0V for periods up to 20 ns.
3. No more than one output may be shorted to ground at a time. Duration of the short circuit should not be greater than one second.
4. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this data sheet is not implied. Exposure of the device to absolute maximum rating conditions for extended periods may affect device reliability.

The S70GL01GN00 is a 1024 Mbit, single power supply flash memory device organized as two S29GL512N dies in a single 64-ball Fortified-BGA package. Each S29GL512N die is 512 Mbit, organized as 33,554,432 words or 67,108,864 bytes. The devices have a 16-bit wide data bus that can also function as an 8-bit wide data bus by using the BYTE# input. The device can be programmed either in the host system or in standard EPROM programmers.

Access times as fast as 110 ns is available. Note that each access time has a specific operating voltage range (V_CC) and an I/O voltage range (V_IO), as specified in the Product Selector Guide‚ on page 5 and the Ordering Information‚ on page 9. The devices are offered in a 56-pin TSOP or 64-ball Fortified BGA package. Each device has separate chip enable (CE# or CE2#), write enable (WE#) and output enable (OE#) controls.

Each S70GL01GN00 requires only a single 3.0 volt power supply for both read and write functions. In addition to a V_CC input, a high-voltage accelerated program (WP#/ACC) input provides shorter programming times through increased current. This feature is intended to facilitate factory throughput during system production, but may also be used in the field if desired.

The S70GL01GN00 are entirely command set compatible with the JEDEC singlepower- supply Flash standard. Commands are written to the device using standard microprocessor write timing. Write cycles also internally latch addresses and data needed for the programming and erase operations.

The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. The device is fully erased when shipped from the factory.

Device programming and erasure are initiated through command sequences. Once a program or erase operation starts, the host system need only poll the DQ7 (Data# Polling) or DQ6 (toggle) status bits or monitor the Ready/Busy# (RY/ BY#) output to determine whether the operation is complete. To facilitate programming, an Unlock Bypass mode reduces command sequence overhead by requiring only two write cycles to program data instead of four.

Hardware data protection measures include a low V_CC detector that automatically inhibits write operations during power transitions. Persistent Sector Protection provides in-system, command-enabled protection of any combination of sectors using a single power supply at V_CC. Password Sector Protection prevents unauthorized write and erase operations in any combination of sectors through a user-defined 64-bit password.

The Erase Suspend/Erase Resume feature allows the host system to pause an erase operation in a given sector to read or program any other sector and then complete the erase operation. The Program Suspend/Program Resume feature enables the host system to pause a program operation in a given sector to read any other sector and then complete the program operation.

The hardware RESET# pin terminates any operation in progress and resets the device, after which it is then ready for a new operation. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device,enabling the host system to read boot-up firmware from the Flash memory device.

The S70GL01GN00 reduces power consumption in the standby mode when it detects specific voltage levels on CE# and RESET#, or when addresses are stable for a specified period of time.

The Secured Silicon Sector provides a 128-word/256-byte area for code or data that can be permanently protected. Once this sector is protected, no further changes within the sector can occur.

The Write Protect (WP#/ACC) feature protects the first or last sector by asserting a logic low on the WP# pin.

MirrorBit flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effectiveness. The device electrically erases all bits within a sector simultaneously via hot-hole assisted erase. The data is programmed using hot electron injection.