S5933

Features: • PCI 2.1 Compliant Master/Slave Device• Full 132 Mbytes/sec Transfer Rate• PCI Bus Operation DC to 33 Mhz• 8/16/32 Bit Add-On User Bus• Four Definable Pass-Thru Regions• Two 32 Byte FIFOs• Sync/Async Add-On Bus Operation• Mail Box Register...

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S5933 Picture
SeekIC No. : 004482609 Detail

S5933: Features: • PCI 2.1 Compliant Master/Slave Device• Full 132 Mbytes/sec Transfer Rate• PCI Bus Operation DC to 33 Mhz• 8/16/32 Bit Add-On User Bus• Four Definable Pass-T...

floor Price/Ceiling Price

Part Number:
S5933
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/23

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Product Details

Description



Features:

• PCI 2.1 Compliant Master/Slave Device
• Full 132 Mbytes/sec Transfer Rate
• PCI Bus Operation DC to 33 Mhz
• 8/16/32 Bit Add-On User Bus
• Four Definable Pass-Thru Regions
• Two 32 Byte FIFOs
• Sync/Async Add-On Bus Operation
• Mail Box Registers w/Byte Level Status
• Direct Mail Box Data Strobe/Interrupts
• Big/Little Endian Conversions
• Direct PCI & Add-On Interrupt Pins
• Boot Loading from nvRAM or Byte Wide
• Optional Expansion BIOS/POST Code
• 160 Pin PQFP



Application

• High Speed Networking
• Digital Video Applications
• I/O Communications Ports
• High Speed Data Input/Output
• Multimedia Communications
• Memory Interfaces
• High Speed Data Acquisition
• Data Encryption/Decryption
• Intel i960 Interface
• General Purpose PCI Interfacing



Pinout

  Connection Diagram


Specifications

Supply Voltage Range                                                                                     (VDD Core)-0.3 V to 7.0 V
Input Pin Voltage Range                                                                                        -0.5 V to VDD + 0.5 V
Storage Temperature Range                                                                                              -55 to 125



Description

The S5933 was developed to break the PC data I/O bottleneck and clearly opens the door to increasing system speed and expansion capabilities. The PCI Local bus moves high speed peripherals from the I/O bus and places them closer to the system's processor bus, providing faster data transfer between the processor and peripherals. The PCI Local bus also addresses the industry's need for a standard that is not directly dependent on the speed, size and type of processor bus. It represents the first microprocessor independent bus offering performance more than adequate for the most demanding applications, such as full-motion video.

Applied Micro Circuits Corporation (AMCC), the premier supplier of single chip solutions, has developed and produced the S5933 to solve the problem of interfacing applications to the PCI Local bus. The S5933, or 'Matchmaker', is a powerful and flexible PCI controller supporting several levels of interface sophistication. At the lowest level, it can serve simply as a PCI bus Target with modest transfer requirements. For high-performance applications, the S5933 can become a Bus Master to attain the PCI Local bus peak transfer capability of 132 MBytes/sec.

The MatchMaker is an off-the-shelf, low-cost, standard product, which is PCI 2.1 compliant. And, since AMCC is a member of the PCI Special Interest Group, the S5933 has been tested in "compliance workshops" along with other manufacturer's PCI systems, chip sets and BIOSs. This removes the burden of compliance testing from the designer and thus significantly reduces development time. Utilizing the S5933 allows the designer to focus on the actual application, not debugging the PCI interface.

The MatchMaker allows special direct data accessing between the PCI bus and the user application through implementation of four definable Pass-Thru data channels. Each data channel is implemented by defining a Host memory segment size and 8/16/32-bit user bus width. The addition of two 32 byte FIFOs, also used in S5933 Bus Mastering applications, provides further versatility to data transfer capabilities. FIFO DMA transfers are supported using Address and Transfer Count Registers. Four 32-bit Mailbox Registers coupled with a Status Register and extensive interrupt capabilities provide flexible user command or message transfers between the two buses. In addition, the S5933 also allows use of an external serial, or byte-wide non-volatile memory to perform any pre-boot initialization requirements and to provide custom expansion BIOS or POST code capability.




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