S3155

The S3155 SONET/SDH transceiver chip is a fully integrated serialization/ deserialization SONET OC-48 (2.488 - 2.67 Gbps) interface device. The S3155 receives an OC-48 scrambled Non- Return to Zero (NRZ) signal and recovers the clock from the data. The chip performs all necessary serial-toparallel and parallel-to-serial functions in conformance with SONET/SDH transmission standards. The device is suitable for SONET-based WDM applications. The figure below shows a typical network application.

On-chip clock synthesis is performed by the high-frequency Phase-Locked Loop (PLL) on the S3155 transceiver chip allowing the use of a slower external transmit clock reference. The chip can be used with a 155.52 or 166.63 MHz reference clock in support of existing system clocking schemes.

The low jitter LVPECL interface is compliant with the bit-error rate requirements of the Telecodia and ITU-T standards. The S3155 is packaged in a 196 PBGA, offering designers a small package outline.