S1D13806F00A2

The S1D13806F00A supports Analog Auto-Power-down, that is, the analog part of the S1D13806F00A can be shut down temporarily according to user requirements or when the S1D13806F00A is in a power down state with the wakeup function disabled. In addition, when the analog part is shut down and the IsolateB pin is low (i.e. the main power is off), then both the analog and digital parts stop functioning and the power consumption of the S1D13806F00A will be negligible. The S1D13806F00A also supports an auxiliary power auto-detect function, and will auto-configure related bits of their own PCI power management registers in PCI configuration space. Connecting SPS high enables the software mode. In this mode, an external host controller writes configuration data to the DS2164Q by the serial port through inputs SCLK, SDI, and CS (Figure 2). Each write to the DS2164Q is either a 2-byte write or a 4-byte write. A 2-byte write consists of the address/command byte (ACB), followed by a byte to configure the control register (CR) for either the X or Y channel. The 4-byte write consists of the ACB, followed by a byte to configure the CR, and then 1 byte to set the input time slot and another byte to set the output time slot.

The S1D13806F00A individual output enable/freeze control of the Z9972 allows the user to implement unique power management schemes into the design. The outputs are stopped in the logic 0 state when the freeze control bits are activated. The serial input register contains one programmable freeze enable bit for 12 of the 14 output clocks. The QC0 and FB_OUT outputs can not be frozen with the serial port, this avoids any potential lock up situation should an error occur in the loading of the serial .The DS75107 dual line circuits may also be used in unbal- anced or single line systems. Although these systems do not offer the same performance as balanced systems for long lines, they are adequate for very short lines where environ- ment noise is not severe.