Features: • Operational from 9.9 Gbps to 11.3 Gbps• Built-In Self Test (BIST) with Error Counter• On-chip High-Frequency PLLs for Clock Recovery and Clock Gen.• 16-bit LVDS Parallel Data Path• TX and RX Lock Detect Indicators• Reference Loop Timing Modes• ...
S19250: Features: • Operational from 9.9 Gbps to 11.3 Gbps• Built-In Self Test (BIST) with Error Counter• On-chip High-Frequency PLLs for Clock Recovery and Clock Gen.• 16-bit LVDS P...
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The S19250 MUX/DeMux chip is a fully integrated serialization/de-serialization SONET STS-192/10 GB Ethernet/Fiber Channel transceiver with Electronic Dispersion Compensation (EDC). This device can be used to compensate channel impairments caused by Single Mode Fiber (SMF) and copper medium. The chip performs all necessary parallel-to-serial and serial-to-parallel functions in conformance with SONET/SDH, 10 Gigabit Ethernet (10 GbE) and 10 Gigabit Fibre Channel (10 G FC) transmission standards. The figure below shows a typical network application. The other application block diagrams are shown on page 2.
On-chip clock synthesis PLL components are contained in the S19250 chip, allowing the use of a slower external transmit clock reference. The chip can be used with 155.52 MHz or 622.08 MHz (or equivalent FEC/10 GbE/10 G FC rates) reference clocks, in support of existing system clocking schemes. The low-jitter LVDS interface guarantees compliance with the biterror rate requirements of the Telcordia and ITUT standards.