S-2210R

PinoutDescriptionThe S-2210R non-volatile RAM (NV RAM) is designed as a non-volatile CMOS memory conbining a static CMOS RAM and a non-volatile electronically programmable memory (E2PROM) as its back-up on a 1-to-1 basis. Since the RAM is an asynchronous CMOS static RAM, it is used very little cur...

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SeekIC No. : 004481629 Detail

S-2210R: PinoutDescriptionThe S-2210R non-volatile RAM (NV RAM) is designed as a non-volatile CMOS memory conbining a static CMOS RAM and a non-volatile electronically programmable memory (E2PROM) as its bac...

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Part Number:
S-2210R
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/24

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Description

The S-2210R non-volatile RAM (NV RAM) is designed as a non-volatile CMOS memory conbining a static CMOS RAM and a non-volatile electronically programmable memory (E2PROM) as its back-up on a 1-to-1 basis. Since the RAM is an asynchronous CMOS static RAM, it is used very little current. Its typical applications includ constants settings, data memory, rewritable programs and firm ware, system configuration setting, system parameters and part No. setting, system statusmonitor and others.

S-2210R has seven features. (1)Single 5V power supply. All inputs and outputs are TTL compatible. (2)Store and recall are controlled by a narrow signal width is larger than 100ns. (3)E2PROM rewritings 10^4 times. (4)E2PROM memory preservability 10 years. (5)Erroneous storage prevention function approx. 3.5V or less. (6)Autorecall function at power making. (7)Tri-state output. Those are all the main features.

Some important electrical specifications of S-2210R have been concluded into several points as follow. (1)Its capacity would be 256 bits. (2)Its configuration is 64x4. (3)Its operating voltage range would be 5V+/-10%. (4)Its current consumption would be max 40mA for operating and 30uA for standby. (5)Its static RAM operation would be min 300ns for read cycle time and max 300ns for access time and would be min 300ns for write cycle time and would be min 200ns for write pulse width. (6)Its store operation would be max 10^7ns for store time and would be min 200ns for store pulse width. (7)Its array recall operation would be min 1300ns for recall cycle time and would be min 300ns for recall pulse width. (8)Its package would be 18 DIP. And so on. At present we have not got so much information about this IC and we would try hard to get more information about it. If you have any question or suggestion or want to know more information please contact us for details. Thank you!




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