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RC32365

Features: RC32300 32-bit CPU core 32-bit MIPS instruction set Supports big or little endian operation MMU 16-entry TLB Supports variable page sizes and enhanced write algorithm Supports variable number of locked entries 8KB Instruction Cache 2-way set associative LRU replacement algorithm 4 word ...

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SeekIC No. : 004472578 Detail

RC32365: Features: RC32300 32-bit CPU core 32-bit MIPS instruction set Supports big or little endian operation MMU 16-entry TLB Supports variable page sizes and enhanced write algorithm Supports variable nu...

RC32365 Data Sheet

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Part Number:
RC32365
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

RC32300 32-bit CPU core
32-bit MIPS instruction set
Supports big or little endian operation
MMU
16-entry TLB
Supports variable page sizes and enhanced write algorithm
Supports variable number of locked entries
8KB Instruction Cache
2-way set associative
LRU replacement algorithm
4 word line size
Sub-block ordering
Word parity
Per line cache locking
2KB Data Cache
2-way set associative
LRU replacement algorithm
4 word line size
Sub-block ordering
Byte parity
Per line cache locking
Can be programmed on a page basis to implement writethrough o write allocate, write-through write allocate, or rite-back algorithms
Enhanced EJTAG and JTAG Interfaces
Compatible with IEEE Std. 1149.1-1990
Security Engine
Dedicated DMA channels for high speed data transfers to and rom the security engine
On-chip memory for storage of two security contexts
Supports ECB and CBC modes for the following symmetric ncryption algorithms: DES, triple DES (both two key (k1=k3) nd three key (k1!=k3) modes), AES-128 with 128-bit blocks, ES-192 with 128-bit blocks
Hardware support for encryption pad generation and checking sing one of seven popular padding algorithms: supports pad lgorithm required by IPSec ESP
Supports MD5 and SHA-1 one-way hash functions
Programmable truncation length of computed hash and HMAC n a security context basis
Supports concurrent hash and encryption operations


Specifications

Symbol Parameter Min1 Max1 Unit
VCCI/O I/O Supply Voltage -0.6 4.0 V
VCCCore Core Supply Voltage -0.3 3.0 V
VCCPLL PLL Supply Voltage -0.3 3.0 V
Vimin Input Voltage - undershoot -0.6 - V
Vi I/O Input Voltage Gnd VCCI/O+0.6 V
Ta,
Industrial		 Ambient Operating
Temperature		 -40 +85
Ta,
Commercial		 Ambient Operating
Temperature		 0 +70
Tstg Storage Temperature -40 +125



Description

The following table lists the functions of the pins provided on the RC32365. Some of the functions listed may be multiplexed onto the same pin indicated as alternate functions).

To define the active polarity of a signal, a suffix will be used. Signals ending with an "N" should be interpreted as being active, or asserted, when at  logic zero (low) level. All other signals (including clocks, buses, and select lines) of RC32365 will be interpreted as being active, or asserted, when at a logic one high) level.




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