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R4F2116

Features: • Upward-compatibility with H8/300 and H8/300H CPUs Can execute H8/300 CPU and H8/300H CPU object programs• General-register architecture Sixteen 16-bit general registers also usable as sixteen 8-bit registers or eight 32-bit registers• Sixty-five basic ...

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R4F2116: Features: • Upward-compatibility with H8/300 and H8/300H CPUs Can execute H8/300 CPU and H8/300H CPU object programs• General-register architecture Sixteen 16-bit general...

R4F2116 Data Sheet

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Part Number:
R4F2116
Supply Ability:
5000

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  • 1~5000
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  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/19

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Product Details

Description



Features:

• Upward-compatibility with H8/300 and H8/300H CPUs
 Can execute H8/300 CPU and H8/300H CPU object programs
• General-register architecture
 Sixteen 16-bit general registers also usable as sixteen 8-bit registers or eight 32-bit registers
• Sixty-five basic instructions
 8/16/32-bit arithmetic and logic instructions
 Multiply and divide instructions
 Powerful bit-manipulation instructions
• Eight addressing modes
 Register direct [Rn]
 Register indirect [@ERn]
 Register indirect with displacement [@(d:16,ERn) or @(d:32,ERn)]
 Register indirect with post-increment or pre-decrement [@ERn+ or @ERn]
 Absolute address [@aa:8, @aa:16, @aa:24, or @aa:32]
 Immediate [#xx:8, #xx:16, or #xx:32]
 Program-counter relative [@(d:8,PC) or @(d:16,PC)]
 Memory indirect [@@aa:8]
• 16-Mbyte address space
 Program: 16 Mbytes
 Data: 16 Mbytes
• High-speed operation
 All frequently-used instructions are executed in one or two states
 8/16/32-bit register-register add/subtract: 1 state
 8 * 8-bit register-register multiply: 12 states (MULXU.B), 13 states (MULXS.B)
 16 ÷ 8-bit register-register divide: 12 states (DIVXU.B)
 16 * 16-bit register-register multiply: 20 states (MULXU.W), 21 states (MULXS.W)
 32 ÷ 16-bit register-register divide: 20 states (DIVXU.W)
• Two CPU operating modes
 Normal mode*
 Advanced mode
• Power-down state
 Transition to power-down state by SLEEP instruction
 Selectable CPU clock speed
Note: * Normal mode is not available in this LSI.




Specifications

Item Symbol Value Unit
Power supply voltage* VCC 0.3 to +4.3 V
Input voltage (except port 7, D, A, G, E,
P97, P86, P52, and P42)		 Vin 0.3 to VCC +0.3 V
Input voltage (port A, G, E, P97, P86,
P52, and P42)		 Vin 0.3 to +7.0 V
Input voltage (AN input is not selected
for port D)		 Vin 0.3 to VCC +0.3 V
Input voltage (AN input is selected for
port D)		 Vin 0.3 to VCC +0.3 or 0.3 to
AVCC +0.3 whichever is lower		 V
Input voltage (port 7) Vin 0.3 to AVCC +0.3 V
Reference power supply voltage AVref 0.3 to AVCC + 0.3 V
Analog power supply voltage AVCC 0.3 to +4.3 V
Analog input voltage VAN 0.3 to AVCC + 0.3 V
Operating temperature Topr 20 to +75
Operating temperature (when flash
memory is programmed or erased)		 Topr 0 to +75
Storage temperature Tstg 55 to +125
Caution: Permanent damage to this LSI may result if absolute maximum ratings are exceeded.
Make sure the applied power supply does not exceed 4.3V.
Note: * Voltage applied to the VCC pin.
The VCL pin should not be applied a voltage.




Description

The H8S/2000 CPU is a high-speed central processing unit with an internal 32-bit architecture that is upward-compatible with the H8/300 and H8/300H CPUs. The H8S/2000 CPU has sixteen 16-bit general registers, can address a 16-Mbyte linear address space, and is ideal for realtime control.

This section describes the H8S/2000 CPU. The usable modes and address spaces differ depending on the product. For details on each product, see section 3, MCU Operating Modes.






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