R1RP0416D

Features: • Single 5.0 V supply: 5.0 V ± 10%• Access time: 12 ns (max)• Completely static memory No clock or timing strobe required• Equal access and cycle times• Directly TTL compatible All inputs and outputs• Operating current: 160 mA (max)R...

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SeekIC No. : 004468963 Detail

R1RP0416D: Features: • Single 5.0 V supply: 5.0 V ± 10%• Access time: 12 ns (max)• Completely static memory No clock or timing strobe required• Equal access and cycle times̶...

floor Price/Ceiling Price

Part Number:
R1RP0416D
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/20

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Product Details

Description



Features:

• Single 5.0 V supply: 5.0 V ± 10%
• Access time: 12 ns (max)
• Completely static memory
 No clock or timing strobe required
• Equal access and cycle times
• Directly TTL compatible
 All inputs and outputs
• Operating current: 160 mA (max)
• TTL standby current: 40 mA (max)
• CMOS standby current : 5 mA (max)
   : 1.0 mA (max) (L-version)
• Data retention current: 0.5 mA (max) (L-version)
• Data retention voltage: 2 V (min) (L-version)
• Center VCC and VSS type pin out



Pinout

  Connection Diagram


Specifications

Parameter Symbol Value Unit
Supply voltage relative to VSS Vcc -0.5 to +4.6 V
Voltage on any pin relative to VSS VT −0.5*1 to VCC + 0.5*2 V
Power dissipation PT 1.0 W
Operation temperature Topr -40 to +85 °C
Storage temperature Tstg -65 to +150 °C
Storage temperature range under bias Tbias -40 to +85 °C
Notes: 1. VT (min) = −2.0 V for pulse width (under shoot) 6 ns.
           2. VT (max) = VCC + 2.0 V for pulse width (over shoot) 6 ns.



Description

The R1RP0416D Series is a 4-Mbit high speed static RAM organized 256-k word × 16-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing technology. The R1RP0416D is most appropriate for the application which requires high speed, high density memory and wide bit width configuration, such as cache and buffer memory in system. It is packaged in 400-mil 44-pin plastic SOJ and 400-mil 44-pin plastic TSOPII.




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