PT7C4511

Features: • Zero ppm multiplication error• Input crystal frequency of 5 - 30 MHz• Input clock frequency of 4 - 50 MHz• Output clock frequencies up to 200 MHz• Peak to Peak Jitter less than 200ps over 200ns interval (100~200MHz)• Low period jitter 50ps (100~200MH...

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SeekIC No. : 004466612 Detail

PT7C4511: Features: • Zero ppm multiplication error• Input crystal frequency of 5 - 30 MHz• Input clock frequency of 4 - 50 MHz• Output clock frequencies up to 200 MHz• Peak to P...

floor Price/Ceiling Price

Part Number:
PT7C4511
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/25

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Product Details

Description



Features:

• Zero ppm multiplication error
• Input crystal frequency of 5 - 30 MHz
• Input clock frequency of 4 - 50 MHz
• Output clock frequencies up to 200 MHz
• Peak to Peak Jitter less than 200ps over 200ns interval (100~200MHz)
• Low period jitter 50ps (100~200MHz)
• Duty cycle of 45/55%
• 9 selectable frequencies controlled by S0, S1 pins
• Operating voltages of 3.0 to 5.5V
• Tri-state output for board level testing



Pinout

  Connection Diagram


Specifications

Storage temperature ................................................... -65 to 150
Ambient Operating Temperature ....................................... 0 to 70
Supply Voltage to Ground Potential (VCC) ...................-0.3 to +7.0V
Inputs (Referenced to GND) ................................... -0.5 to Vcc+0.5V
Clk Output (Referenced to GND).......................... -0.5 to Vcc+0.5V
Soldering Temperature (Max of 10 seconds) .......................... 260



Description

The PT7C4511 is a high performance frequency multiplier, which integrates Analog Phase Lock Loop techniques. The PT7C4511 is the most cost effective way to generate a high quality, high frequency clock output from a lower frequency crystal or clock input.

PT7C4511 is designed to replace crystal oscillators in most electronic systems, clock multiplier and frequency translation. Using Phase-Locked-Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 200 MHz. The complex Logic divider is the ability to generate nine different popular multiplication factors, allowing one chip to output many common frequencies.

The PT7C4511 also has an Output Enable pin that tristates the clock output when the OE pin is taken low. This product is intended for clock generation and frequency translation with low output jitter (variation in the output period)




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