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PRSQ-80G

Features: The PRS Q-80G switch core device offers the following features:• Non-blocking, single-stage, shared-memory switch• Device aggregate throughput: 80 Gbps• One-device switch: 40 Gbps of aggregate user bandwidth (16x16 ports at 2.5-Gbps/OC-48c speed, or 4x4 ports at 10-Gbps...

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SeekIC No. : 004465342 Detail

PRSQ-80G: Features: The PRS Q-80G switch core device offers the following features:• Non-blocking, single-stage, shared-memory switch• Device aggregate throughput: 80 Gbps• One-device switch...

PRSQ-80G Data Sheet

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Part Number:
PRSQ-80G
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/25

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Product Details

Description



Features:

The PRS Q-80G switch core device offers the following features:
• Non-blocking, single-stage, shared-memory switch
• Device aggregate throughput: 80 Gbps
• One-device switch: 40 Gbps of aggregate user bandwidth (16x16 ports at 2.5-Gbps/OC-48c speed, or 4x4 ports at 10-Gbps/OC-192c speed)
• Two-device switch: 80 Gbps of aggregate user bandwidth (32x32 ports at 2.5-Gbps/OC-48c speed, or 8x8 ports at 10-Gbps/OC-192c speed)
• 2.5-Gbps ports with speed-up factor of two (in conjunction with PRS C48X fabric interface)
• 10-Gbps ports with speed-up factor of two (in conjunction with PRS C192X fabric interface)
• 10-Gbps port operation in 4x 2.5-Gbps mode (in conjunction with PRS C192X fabric interface)
• Embedded SerDes: 3.2-Gbps high-speed serial links, XAUI compliant, with 8b/10b encoding for link synchronization and supervision
• Multicast and broadcast without cell duplication in shared memory (cell replication at sending)
• TDM traffic support
• Traffic priorities (CoS): up to four (configurable number)
• Output queue scheduling options: strict priority scheduling, configurable credit table (weighted round-robin), exhaustive highest priority first
• Redundant switch plane operations: hot standby or load sharing mode, programmable scheduled switchover (cell lossless)
• Flow control based on a grant mechanism, subport flow control
• Programmable flow control thresholds for output queues, shared memory, multicast/broadcast
• Fixed-length cells with configurable length (64, 72, or 80 bytes)
• Programmable cell header size: two, three, or five bytes, independent of the switch configuration, containing destination bitmap, packet priority, and switch redundancy support information, all protected by a parity bit
• Local control processor interface (serial host interface)
• Reception (transmission) of control cells sent to (by) the local processor on any input (output) port
• AMCC software for switch board control, PC-based development / test tools
• Pin-to-pin and switch control software compatibility with PRS 64Gu switch core
• Backward compatibility with PRS C48 or PRS C192 fabric interfaces: SerDes operation at 2.5 Gbps (speed-up factor of 1.6)
  Inter-operability in PRS Q-80G chassis: line cards with any of the PRS C48, PRS C48X, PRS C192, and PRS C192X devices


Description

The PRSQ-80G device performs the switch core function, in configurations of two, four, or eight devices, depending on the switching capacity needs. The PRS C48X and PRS C192X devices perform the queuing manager function of the PRS Q-80G-based switches. An adapter card can be equipped with either a PRS C48X interfacing a 2.5-Gbps / OC-48 network processor or a PRS C192X interfacing a 10-Gbps / OC-192 network processor or up to four 2.5-Gbps / OC-48 network processors.




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