PR31700

Features:

• R3000A-based PR3901 Processor Core
RISC architecture developed by MIPS Technologies, Inc.
Philips has added its own multiply-add and branch-likely instructions.
A single-cycle multiply/accumulate module to allow integrated DSP functions, such as a software modem for high-performance standard data and fax protocols
Instruction cache: 4K bytes; data cache: 1K bytes
On-chip Translation Lookaside Buffer (TLB) with 3264-bit wide entries, each of which maps 4KByte page Max 75MHz operation
• Built-in peripheral circuit
Clock generator with built-in eightfold-frequency phase-locked loop (PLL)
Four-stage write buffer
A high performance and flexible Bus Interface Unit
Multiple DMA channels
Memory controller for DRAM, HDRAM, SDRAM, SRAM, ROM, Flash Memory and PCMCIA
Power management unit
Big / Little endian
• Low power dissipation
3.3V operation
Standby Current 10A(typ)
CPU clock stop mode
Power down modes for individual internal peripheral modules
• Plastic LQFP 208-pin package


Specifications

SYMBOL	PARAMETER	LIMITS	UNIT
VDD	Power supply voltage	VSS 0.5 to 4.5	V
VIN	Input voltage	VSS 0.5 to VDD + 0.5	V
Tstg	Storage temperature range	55 to +125
Pd	Maximum dissipation (Tamb = 70°C)	1	W

NOTE: 1. Using an LSI at specifications higher than the maximum ratings can cause permanent damage to the LSI. For normal operation, use under the recommended operating conditions. Exceeding the recommended operating conditions may affect the reliability of the LSI.


Description

The PR31700 is a single-chip digital ASSP (Application Specific Stand Product) used in HPCs (Handheld Personal Computers), Palm-size PCs, Screenphones, Smartphones, and other vertical market applications in the mobile computing and communication markets. The PR31700 consists of system support logic, integrated with the PR3901 Processor Core designed by Philips Semiconductors.