PQ2FADS-VR

• Supports MPC8250 (Hip4) and MPC8275 (Hip7) processors.
• 64 bit PowerQUICC II Communication Processor, running @ up to 100MHz external bus frequency.
• 32 MByte Synchronous Dram (soldered on-board), residing on 60X bus (PBI mode) with optional parity support, controlled by SDRAM machine 1. Optional address Latch - Multiplexer is available if L2 cache module is assembled.
• Optional 1/2 MByte L2-Cache on-board using 2 MPC2605 Look-Aside cache modules.
• 8 MByte, 80 pin Flash SIMM, buffered from 60X bus. Support for upto 32 MByte, controlled by GPCM, 5V/12V Programmable, with Automatic Flash SIMM identification, via BCSR. Support for both On and OFF SIMM Flash reset.
• 5V/12V VPP (in-circuit programming voltage) for Flash SIMM - jumper selectable.
• 8 KBytes E2PROM, buffered from the 60x bus, controlled by the GPCM.
• Board Control & Status Register - BCSR, Controlling Boards' Operation.
• On-board COP/JTAG connector.
• On-board logic to support direct connection to standard Parallel Port (EPP/SPP modes) in Desk Top PC for debug purposes using MetroWerks CodeWarrior tools.
• Power-On Reset Option via JTAG.
• Programmable Power-On Reset and Hard-Reset Configuration via E2PROM or via Flash memory for the PQ2 core.
• PCI Local Bus is PCI Standard 2.2 compliant.
• 3 PCI slots are available to host up to 3 masters/targets cards @ 3.3V only - arbitration is supported by the on-chip Arbiter.
• PCI bus supports 25 - 66 MHz @ 3.3V devices (determined by the user).
• Simple generic Interrupt Controller to handle the PCI interrupts (4 in each PCI slot).
• Module Enable Indications for all on-board modules.
• High density (MICTOR) Logic Analyzer connectors, carrying all 60x, local bus and CPM signals, for fast logic analyzer connection.
• 155 Mbps ATM UNI on FCC1 with Optical I/F, connected to the PQ2 via UTOPIA Level 2 I/F supporting 8/16 bit in single/multi PHY, using the PMC-SIERA 5384.
• Two 100/10-Base-T Ports on FCC2 and FCC3 with T.P. I/F, MII/RMII controlled, using Davicom DM9161.
• USB Port, USB 1.1 Standard Compliant, using Philips PDIUSBP11 USB transceiver. USB Port is with shutdown option and speed selectable - BCSR controlled.
• Dual RS232 port residing on SCC1 & SCC2.
• Module disable (i.e., low-power mode) option for all communication transceivers -BCSR controlled, enabling use of communication ports, off-board via the expansion connectors.
• Dedicated PQ2 communication ports expansion connectors for convenient tools' connection, carrying also necessary bus signals, for transceivers' M/P I/F connection. Use is done with 2 X 128 pin DIN 41612 receptacle connectors.
• External Tools' identification & status read capability, via BCSR.
• Separate Power-On Reset Push - Button, Soft / Hard1 Reset Push - Button and ABORT Push - Button.
• ATX Power Supply.
• Multi-Range PQ2 internal logic operation voltage - selectable by jumper between three ranges - 1.3V to 1.7V for MPC8275 (Hip7), 1.7V to 1.9V for PQ2 (Hip4) or 2.3V to 2.7V.
• Software Option Switch provides 8 S/W options via BCSR.

This document is an operation guide for the PQ2FADS-VR board. It contains operational, functional and general information about the PQ2FADS-VR. This board is meant to serve as a platform for s/w and h/w development for the POWER QUICC II family of processors in a TEPBGA package (516 Pins for Hip4 and Hip7). Using its on-board resources and a debugger, a developer is able to download code, run it, set breakpoints, display memory and registers and connect proprietary h/w via the expansion connectors, to be incorporated into a desired system with the POWER QUICC II processors.

 This board could also be used as a demonstration tool (i.e., application s/w may be programmed1 into its Flash memory and ran in exhibitions etc.).