SpecificationsInherent Delay Time (Step 0) ..................... 2.00 ns + 0.50 nsDelay Per Programming Step ................................. See TableMaximum Programming Delay ................... 2 ns + (15 x Step)Output Rise Time (20% to 80%) ....................... 2.00 ns Max.
PPECL2: SpecificationsInherent Delay Time (Step 0) ..................... 2.00 ns + 0.50 nsDelay Per Programming Step ................................. See TableMaximum Programming Delay ................... ...
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