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PNX15xx

Features: `32-bit, up to 300 MHz 5-issue VLIW CPU with 128 32-bit registers and an extensive set of video and audio media instructions.`Allows V2F power management to control frequency and power consumption based on application requirement.`High quality hardware image scaler and advanced de-interl...

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PNX15xx: Features: `32-bit, up to 300 MHz 5-issue VLIW CPU with 128 32-bit registers and an extensive set of video and audio media instructions.`Allows V2F power management to control frequency and power con...

PNX15xx Data Sheet

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Part Number:
PNX15xx
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/8

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Product Details

Description



Features:

`32-bit, up to 300 MHz 5-issue VLIW CPU with 128 32-bit registers and an extensive set of video and audio media instructions.
`Allows V2F power management to control frequency and power consumption based on application requirement.
`High quality hardware image scaler and advanced de-interlacer, augmented with media processing software to do motion compensated de-interlacing.
`2D Drawing Engine capable of 3 operand BitBlt (all 256 raster operations), line drawing, and host font expansion.
`10-bit YUV Video capture supporting horizontal downscaling scaling up to 40.5 Mpix/s.
`2-layer compositing video output, with integrated scaling and video improvement processing, supporting W-XGA TFTs, 1280 x 768 60 Hz, HD video, up to 1920 x 1080 60 I, or up to 81 Mpix/s.
`Data Streaming and Message Passing ports with up to 400 MB/s bandwidth capability.
`Variable Length Decoder assist engine.
`Integrated DVD descrambler for DVD playback functionality.
`Octal digital audio in plus S/PDIF (Dolby DigitalTM) input.
`Octal channel digital audio output plus S/PDIF (Dolby DigitalTM) output.
`Integrated controller for unified DDR SDRAM memory system of 16 - 256 MB using 32-bit wide data at up to 400 MHz data rate, i.e. up to 1.6 GB/s. Configurable to a 16-bit wide DDR SDRAM interface.
`32-bit, 33 MHz PCI 2.2 interface with integrated PCI bus arbiter up to 4 masters.
`Glueless NOR and NAND 8- or 16-bit Flash interface.
`4 timers/counters, capable of counting internal and external events.
`16 dedicated General Purpose I/O pins, suitable as software I/O pins, external interrupt pins, universal Remote Control Blaster, clock source/gate for system event timers/counters and emulating high-speed serial protocols.
`Additional multiplexed General Purpose I/O pins.
`On-chip MPEG-1 and MPEG-2 VLD to facilitate transrating, transcoding and software SD MPEG decoding.
`Integrated low-speed, DVD drive capable, IDE controller (shares PCI pins,requires 2 external buffers to isolate, up to ATAPI/PIO-4).
`All video/audio timing derived from a single low-cost external crystal (no VCXO's required).
`10/100 RMII and MII IEEE 802.3 PHY interface.


Specifications

Symbol
Description
Minimum
Maximum
Units
Note
VCCP 3.3 V I/O supply voltage -0.5 4.6 V
VCCM 2.5 V DDR I/O supply voltage -0.5 3.6 V
VDD 1.2-1.3-V Core supply voltage -0.5 1.7 V
VICCP Input voltage for 5 V tolerant input pins (i.e. pins supplied by VCCP) -0.5 6.0 V
Tstg Storage temperature range -65 150 °C
Tcase Operating case temperature range 0 120 °C
HBMESD Human Body Model Electrostatic handling for all pins - 2000 V [1]
MMESD Machine Model Electrostatic handling for all pins - 150 V [2]



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