PM8351

Features: • Eight independent 1.0-1.25 Gbit/s transceivers• Ultra low power operation: 1.25 Watts typical• Integrated serializer/deserializer, clock synthesis, clock recovery, and 8B/10B encode/decode logic• Physical Coding Sublayer (PCS) logic for Gigabit Ethernet• O...

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PM8351 Picture
SeekIC No. : 004463885 Detail

PM8351: Features: • Eight independent 1.0-1.25 Gbit/s transceivers• Ultra low power operation: 1.25 Watts typical• Integrated serializer/deserializer, clock synthesis, clock recovery, and ...

floor Price/Ceiling Price

Part Number:
PM8351
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/25

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Product Details

Description



Features:

• Eight independent 1.0-1.25 Gbit/s transceivers
• Ultra low power operation: 1.25 Watts typical
• Integrated serializer/deserializer, clock synthesis, clock recovery, and 8B/10B encode/decode logic
• Physical Coding Sublayer (PCS) logic for Gigabit Ethernet
• Optional receive FIFO which synchronizes incoming data to local clock domain
• Dual Data Rate (DDR) parallel interface with clock forwarding to halve ASIC terminal count and simplify timing
• Extensive control of loopback, BIST, and operating modes via 802.3 compliant MDC/MDIO serial interface
• Built-in packet generator/checker
• "Trunking" feature to de-skew and align received parallel data across eight channels
• IEEE 1149.1 JTAG testing support
• IEEE 802.3z Gigabit Ethernet and ANSI X3T11 FibreChannel support
• High speed outputs which feature programmable output current to directly drive dual-terminated line
• 2.5 V, 0.25 CMOS technology with 3.3V tolerant I/O
• Direct interface to optical modules, coax, or serial backplanes
• Small footprint 19x19 mm, 289-pin



Application

• High speed serial backplanes
• Gigabit Ethernet links
• FibreChannel links
• Intra-system interconnect
• ASIC to PMD link



Description

The OctalPHYTM is an octal PHYsical layer transceiver ideal for systems requiring large numbers of point-to-point gigabit links. PM8351 provides eight individual serial channels capable of operation at up to 1.25 Gbps, which may be grouped together to form a single 12.5 Gbps bidirectional link.

The OctalPHY includes 8B/10B block coding logic (compliant with 802.3z Gigabit Ethernet and FibreChannel requirements)PM8351  which produces run length limited data streams for serial transmission.

A receive FIFO optionally aligns all incoming parallel data of PM8351 to the local clock domain, adding or removing IDLE sequences as required. This simplifies implementation of the upstream ASIC by removing the requirement to deal with multiple clock domains.

When trunking is enabled, the OctalPHY PM8351 can remove cable skew differences equivalent to several meters, presenting 8-byte data vectors at the receive interface exactly as they were transmitted.

 




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