PM7328

• Monolithic single chip device which andles bi-directional ATM Layer unctions including VPI/VCI address ranslation, cell appending, policing ingress only), cell counting and OAM equirements for 1024 VCs (virtual onnections).
• Instantaneous bi-directional transfer ate of 800 Mbit/s supports a bidirectional ell transfer rate of .42x106 cell/s.
• Ingress input interface supports an 8 or 6 bit PHY interface using direct ddressing for up to 4 PHY devices Utopia Level 1) and Multi-PHY ddressing for up to 32 PHY devices Utopia Level 2).
• Ingress output interface supports an 8 r 16 bit SCI-PHY (52 - 64 byte cell) nterface (Utopia Level 1) to a switch abric.
• Egress input and output interfaces upport an 8 or 16 bit SCI-PHY (52 - 4 byte cell) interface using direct ddressing for up to 4 PHY devices Utopia Level 1) and Multi-PHY ddressing for up to 32 PHY devices Utopia Level 2).
• Compatible with the PM7329 S/UNIAPEX- K800 Traffic Manager, and MC-Sierra's VORTEX Architecture.
• Ingress functionality includes a highly lexible search engine that covers the ntire PHYID/VPI/VCI address range, ual leaky bucket policing, per-VC cell ounts, OAM-FM and OAM-PM rocessing.
• Egress functionality includes direct ddress lookup, per-VC cell counts, AM-FM and OAM-PM processing. er-PHY output buffering scheme esolves the head-of-line blocking ssue.
• Includes a FIFO buffered 16-bit icroprocessor bus interface for cell nsertion and extraction, deterministic C Table access, status monitoring nd configuration of the device.
• Supports DMA access for cell xtraction.
• The UTOPIA and external SRAM nterfaces are 52 MHz max.