PM7325

The S/UNI®- ATLAS-3200 device is a monolithic, single chip device that handles ATM Layer
functions for one direction including VPI/VCI address translation, cell appending, cell rate
policing, per-connection counting, and I.610-compliant OAM requirements for 64K VCs (virtual
connections). Two or more S/UNI-ATLAS-3200 devices can be cascaded to support additional
VCs. The device:
• Can be configured as an Ingress mode device or an Egress mode device.
• Supports a full duplex 16-bit SCI-PHY™ Backwards Cell Interface Port that allows an
Ingress mode device and an Egress mode device to communicate and behave as a single bidirectional device. The SCI-PHY port is a UTOPIA Level 2, non-polled, cell handshaking interface that handles 64-byte extended cells with prepended routing information. This can also be described as a 16-bit, 52 MHz UTOPIA Level 1 interface, with prepended routing information.
• With its instantaneous transfer rate of 3200 Mbit/s, it supports a cell transfer rate of 5.68x106 cells/s (e.g. one STS-48c or four STS-12c streams).
• When configured as an Ingress mode device:
° The Input interface supports a 32-bit 104 MHz UTOPIA Level 3 Link Layer (Master) interface using Multi-PHY addressing with user-programmable weighted polling for up to 48 PHY queues on a single physical port. Extended ATM cell lengths of 52 to 64 bytes are supported, with optional HEC/UDF, prepend, and postpend words. Mapping of physical PHYs to logical PHYs is supported, to facilitate Automated Protection Switching.
° The Output interface supports a 32-bit 104MHz UTOPIA Level 3 PHY Layer (Slave) interface using Multi-PHY handshaking for up to 48 PHY sources. Extended ATM cell lengths of 52 to 64 bytes are supported, with optional HEC/UDF, prepend, and postpend words. A non-polled, direct mode is also supported for this interface.
° Alternately, the Input Interface supports a 32-bit 104 MHz POS-PHY™ Level 3 Rx Link
Layer interface, capable of handling a mix of packets and ATM cells. Each of 48 PHY
queues on a single physical port must be set up to carry either packets or cells. Cells are
processed by S/UNI-ATLAS-3200, but packets are not processed and are buffered and
passed through transparently. In this case, the Output interface supports a 32-bit 104
MHz POS-PHY Rx PHY Layer interface.
• When configured as an Egress mode device:
° The Input interface supports a 32-bit 104 MHz UTOPIA level 3 PHY Layer (Slave)
interface using Multi-PHY handshaking for up to 48 PHY destinations. Extended ATM
cell lengths of 52 to 64 bytes are supported, with optional HEC/UDF, prepend, and
postpend words.

The PM7325 S/UNI®-ATLAS-3200 device is a monolithic integrated circuit that implements the TM Layer functions of PM7325 that include fault and performance management, header translation and cell ate policing. The S/UNI-ATLAS-3200 PM7325 device is a uni-directional part that is intended to reside etween the physical layer (PHY) devices and a traffic manager in the ingress side, and a traffic haper and the PHY devices in the egress side. The S/UNI-ATLAS-3200 PM7325 supports a sustained ggregate throughput of 5.68x106 cells/s in each of the Ingress and Egress modes. The S/UNIATLAS- 200 uses external SRAM to store the search tree data structures. The device is capable f supporting up to 64K connections. Apart from the operation of the UL3 or POS-PHY™ Level  interfaces, the S/UNI-ATLAS-3200 is fully symmetric, with identical features and configuration ptions in either direction.

The Input Cell Interface PM7325 can be connected to a PHY device supporting up to 48 PHY queues via a TOPIA Level 3 or POS-PHY Level 3 bus, or may emulate up to 48 PHYs via multi-PHY ddressing over a UTOPIA Level 3 or POS-PHY Level 3 bus. The 52- or 53-byte ATM cell is ncapsulated in a data structure of PM7325 that can contain prepended or postpended routing information, nd can fill the HEC field out to 32 bits. Received cells are buffered in a programmable-depth er-PHY FIFO. All idle cells, physical layer and unassigned cells of PM7325 are discarded, and any cells rom PHY queues designated as packet PHYs are routed to the output untouched. For the remaining cells, a subset of ATM header and appended bits is used as a search key to find the VC Table record for the virtual connection. If a connection ofPM7325 is not provisioned and the search terminates unsuccessfully as a result, the cell is discarded and a count of invalid cells is incremented. If the search is successful, subsequent processing of the cell is dependent on the contents of the cell and configuration fields in the VC Table Record.

The S/UNI-ATLAS-3200 PM7325 performs header translation, if so configured. The ATM header is replaced by the contents of fields in the VC Table Record for that connection. The VCI contents are passed through transparently for VPC connections; the PTI ofPM7325 is passed through transparently for all connections. The CLP bit may only be altered via the policing function. Appended bytes can be replaced, added or removed.

If the S/UNI-ATLAS-3200 is the end point for a F4 or F5 OAM flow, the OAM cells are terminated and processed. If the S/UNI-ATLAS-3200 PM7325 is not the end point, the OAM cells are passed to the Output Cell Interface with an optional copy passed to the Microprocessor Cell Interface FIFO. The reception of AIS or RDI cells results in the appropriate alarms (segment or end-to-end alarm). Interrupts corresponding to the alarm bits can be masked on a per-connection basis. When configured as a sink of PM cells, upon the arrival  of PM7325 of a Forward Monitoring cell, error counts are updated and a Backward Reporting cell is optionally generated and routed to the Backwards Cell Interface that is connected to the opposite-direction S/UNI-ATLAS-3200 PM7325. When  configured as a source of PM cells, the S/UNI-ATLAS-3200 generates a Forward Monitoring cell when the per-session programmable user cell block size is reached. The insertion of PM cells is paced so that bursts of generated cells will not cause a backup.