PM7323

· Monolithic single chip device which handles ATM switch Ingress VPI/VCI address translation, cell appending, cell rate policing, counting, and OAM requirements for 65,536 VCs (virtual circuits)
· Instantaneous transfer rate of 200 Mbit/s supports a cell transfer rate of 0.355x106 cells/s (one STS-3c).
· Concentrates the traffic from several PHY interfaces into one switch port.
· 8 bit PHY interface using direct addressing for up to 4 PHYs (compatible with Utopia Level 1 cell-level handshake) and Multi-PHY addressing for up to 32 PHYs (Utopia Level 2 compatible).
· 8 bit extended cell format SCI-PHY (52 - 64 byte extended ATM cell with prepend/postpend) interface at output to switch fabric.
· Compatible with wide range of switching fabrics and traffic management architectures including per VC or per PHY queuing.
· Provides identification/tagging of RM cells to support adjunct processing applications such as Virtual Source/Virtual Destination ABR service.
· Supports logical multicast.
· Flexible CAM-type cell identification which can use arbitrary VPI/VCI values and/or cell appended bytes for identification.
· Discards on command all low priority (high CLP bit) cells to relieve switch congestion.
· Can discard or tag the remainder of an AAL5 packet if a single cell in that
packet is discarded or tagged due to policing.
· Includes a 16-bit FIFO buffered microprocessor bus interface for cell extraction and insertion (including OAM), VC table access, control and status  monitoring, and configuration of the device.
· Supports DMA access for cell extraction and insertion.

The PM7322 Routing Control, Monitoring and Policing 200 Mbps (RCMP-200) device is a monolithic integrated circuit that implements ATM layer functions that include fault and performance monitoring, header translation and cell rate policing. The RCMP-200 is intended to be situated between a switch core and the physical layer devices in the ingress direction. The RCMP-200 supports asustained aggregate throughput of 0.355x106 cells/s. The RCMP-200 uses ext ernal SRAM to store per-VPI/VCI data structures. The device is capable of supporting up to 65536 connections.

The Input Cell Interface can be connected to up to 32 physical layer devices through a SCI-PHY compatible bus. The 53 byte ATM cell is encapsulated in a data structure which can contain pre-pended or post-pended routing information. Received cells are buffered in a four cell deep FIFO. All Physical Layer and unassigned cells are discarded. For the remaining cells, a subset of ATM header and appended bits is used as a search key to find the VC Table Record for the virtual connection. If a connection is not provisioned and the search terminates unsuccessfully as a result, the cell is discarded and a count of invalid cells is incremented. If the search is successful, subsequent processing of the cell is dependent on contents of the cell and configuration fields in the VC Table Record.

The RCMP-200 performs header translation if so configured. The ATM header is replaced by contents of fields in the VC Table Record for the connection. The VCI contents are passed through transparently for VPCs. Appended bytes can be replaced, added or removed.

If the RCMP-200 is the end point for a F4 or F5 OAM stream, the OAM cells are dropped and processed. If the RCMP-200 is not the end point, the OAM cells are passed to the Output Cell Interface with an optional copy passed to the Microprocessor Cell Buffer. The reception of an AIS or RDI cell results in the appropriate alarm. Upon the arrival of a Forward Monitoring or Monitoring/Reporting cell, error counts are updated and a Backward Reporting cell is optionally generated. Activate/Deactivate cells are passed to the Microprocessor Cell Buffer for external processing. Continuity Check cells can be generated if no user cells have been received in the latest 1.5 +/- 0.5 or 2.5 +/- 0.5 (default) seconds.