Features: • Maps each of two channels of Gigabit Ethernet using the Generic Framing Procedure (GFP) point-to-point Ethernet over SONET (EoS) encapsulation protocol, or HDLC delineation into a standards-based virtual concatenation stream comprising 1 to 8 STS-3c/VC-4 or 1 to 24 STS-1/VC-3 cha...
PM5397: Features: • Maps each of two channels of Gigabit Ethernet using the Generic Framing Procedure (GFP) point-to-point Ethernet over SONET (EoS) encapsulation protocol, or HDLC delineation into a ...
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• Maps each of two channels of Gigabit Ethernet using the Generic Framing Procedure (GFP) point-to-point Ethernet over SONET (EoS) encapsulation protocol, or HDLC delineation into a standards-based virtual concatenation stream comprising 1 to 8 STS-3c/VC-4 or 1 to 24 STS-1/VC-3 channels.
• Alternatively maps one Gigabit Ethernet channel into an STS-48c channel or independently maps each Gigabit Ethernet channel into either an STS-12c or an STS-24c payload.
• Supports full-rate data transfer and over-subscribed data transfer down to STS-1/VC-3 granularity for Gigabit Ethernet data transfer over SONET/SDH. Ethernet back pressure prevents packet loss when the SONET channel is configured to be less than 1 Gbps.
• Supports interfacing to any full duplex IEEE 802.3 Gigabit Ethernet connection.
• Preserves Ethernet frame, discards IPG, preamble and SFD during mapping, and restores them during demapping.
• Incorporates dual SerDes, compliant with the IEEE 802.3 PMA physical layer specification.
• Supports maximum Ethernet frame size of 9,600 bytes.
• Supports an ingress Ethernet buffer of92.8 Kbytes and an egress Ethernet buffer of 28.8 Kbytes.
• Supports serial differential or parallel GMII Ethernet side transmit and receive Gigabit Ethernet signals.
• Supports IEEE 802.3 flow control, auto-negotiation, and management statistics on Gigabit Ethernet interfaces.
• Provides working and protect 4 x 777.6 MHz LVDS Serial TelecomBus, 4 x 622 Mbps LVDS SONET Serial, or2.488 Gbps LVDS SONET Serial interfaces.
• Supports an on-chip differential delay buffer of one STS-48/STM-16 frame for virtual concatenation.
• Optional off-chip Quad Data Rate (QDR) SRAM supports differential delay of STS-48/STM-16 frames up to 50 ms.
• Performs SONET/SDH path termination, including the processing of H4, C2 and J1 bytes for virtual concatenation.
• Performs alignment of virtual concatenation constituent SONET/SDH channels in the receive direction.
• Performs splitting of user data into multiple constituent SONET/SDH