PM5366

• Integrates three SONET/SDH VT1.5/VT2/TU11/TU12 bit asynchronous or byte
synchronous mappers, three full featured M13 multiplexers with DS3 framers,
three E3 framers, and three SONET/SDH DS3 mappers in a single monolithic
device for terminating 84-1.544 Mbit/s or 63-2.048 Mbit/s data streams.
• Each SPE/DS3 independently programmable to allow the following modes of
operation:
• Five T1 modes of operation:
• Three STS-1, AU3 or TUG3 Bit Asynchronous VT1.5 or TU-11 Mappers with
ingress or egress per tributary link monitoring.
• Up to 84 T1 streams mapped as byte synchronous VT1.5 virtual tributaries into
three STS-1 SPEs or TU-11 tributary units into three STM-1/VC3 or TUG3 from a
STM-1/VC4.
• DS3 M13 Multiplexer with ingress or egress per link monitoring. Includes the
option to asynchronously map the DS3s into three STS-1/STM-0 SPEs.
• Up to 84 DS3 multiplexed 1.544 Mbit/s streams are mapped as bit asynchronous VT1.5 virtual tributaries or TU-11 tributary units, providing a transmultiplexing function between DS3 and SONET/SDH.
• Up to 63 T1 streams mapped as bit asynchronous TU-12 tributary units into three
STM-1/VC3 or TUG3 from a STM-1/VC4.
• Four E1 modes of operation:
• Three STS-1, AU3 or TUG3 Bit Asynchronous VT2 or TU-12 Mappers with
ingress or egress per tributary link monitoring.
• Up to 63 E1 streams mapped as byte synchronous VT2 virtual tributaries into
three STS-1 SPE or TU-12 tributary units into a STM-1/VC3 or TUG3 from a
STM-1/VC4.
• Up to 63 2.048 Mbit/s streams multiplexed into three DS3s following the ITU-T
G.747 recommendation. Includes the option to asynchronously map the DS3s
into three STS-1/STM-0 SPEs
• Up to 63 DS3 multiplexed 2.048 Mbit/s streams are mapped as bit asynchronous VT2 virtual tributaries or TU-12 tributary units, providing a transmultiplexing function between DS3 and SONET/SDH.
• Two unchannelized DS3 modes of operation:
• Standalone unchannelized DS3 framer mode for access to the entire DS3
payload.
• Up to three DS3 streams are mapped bit asynchronously into VC-3s.
• Standalone unchannelized E3 framer mode (ITU-T Rec. G.751 or G.832) for
access to the entire E3 payload.
• Up to 84 VT1.5/TU11 or 63 VT2/TU12 tributaries can be passed between the line
SONET/SDH bus and the SBI bus as transparent virtual tributaries with pointer
processing.
• Supports a byte serial Scaleable Bandwidth Interconnect (SBI) bus interface for
high density system side device interconnection of up to 84 T1 streams, 63 E1
streams, 3 DS3 streams or 3 E3 streams. This interface also supports
transparent virtual tributaries when used with the SONET/SDH mapper.
• Supports insertion and extraction of arbitrary rate (eg. fractional DS3) data
streams to and from the SBI bus interface.
• Provides jitter attenuation in the T1 or E1 receive and transmit directions.
• Provides three independent de-jittered 1.544 MHz or 2.048 MHz recovered
clocks for system timing and redundancy.
• Provides per link diagnostic and line loopbacks.
• Provides an on-board programmable binary sequence generator and detector for
error testing at DS3 and E3 rates. Includes support for patterns recommended in
ITU-T O.151.
• Also provides PRBS generators and detectors on each tributary for error testing
at 1.544 Mbit/s and 2.048 Mbit/s rates as recommended in ITU-T O.151 and
O.152.
• Supports the M23 and C-bit parity DS3 formats.
• When configured to operate as a DS3 or E3 Framer, gapped transmit and
receive clocks can be optionally generated for interface to link layer devices
which only need access to payload data bits.
• DS3 or E3 Transmit clock source can be selected from either an external
oscillator or from the receive side clock (loop-timed).
• Provides a SONET/SDH Add/Drop bus interface with integrated VT1.5, TU-11,
VT2 and TU-12 mapper for T1and E1 streams. Also provides a DS3 mapper.
• System side interface is an SBI bus.
• Provides a generic 8-bit microprocessor bus interface for configuration, control
and status monitoring.
• Provides a standard 5 signal P1149.1 JTAG test port for boundary scan board
test purposes.
• Low power 1.8V/3.3V CMOS technology. All pins are 5V tolerant.
• 324-pin fine pitch PBGA package (23mm x 23mm). Supports industrial
temperature range (-40oC to 85oC) operation.
Each one of 84 T1 performance monitor sections:
• Provides non-intrusive performance monitoring of either ingress or egress paths,
as selected on a per-tributary basis.
• Frames to DS-1 signals in SF, SLC96 and ESF formats.
• Frames to TTC JT-G.704 multiframe formatted J1 signals. Supports the
alternate CRC-6 calculation for Japanese applications.
• Provides Red, Yellow, and AIS alarm integration.
• Supports RAI-CI and AIS-CI alarm detection and generation.
• Non-intrusive performance monitoring provided by the TEMAP-84 also
provides an HDLC interface with 128 bytes of buffering for terminating the
facility data link in either the ingress or egress paths, as selected on a pertributary
basis.
• Provides Inband Loopback Code detection.
• An unframed pseudo-random sequence user selectable from 27 1, 211 1, 215
1 or 220 1, may be detected in the T1 stream in either the ingress or egress
directions. The detector counts pattern errors using a 16-bit non-saturating PRBS
error counter.

The PM5366 High Density 84/63 Channel VT/TU Mapper and M13 Multiplexer (TEMAP-84) is a feature-rich device for use in any applications requiring high density link termination over T1 and E1 (G.747) channelized DS3 or T1 and E1
channelized SONET/SDH facilities.

The TEMAP-84 supports asynchronous multiplexing and demultiplexing of 84 1.544 Mbit/s or 63 2.048 Mbit/s tributaries into three DS3 signals as specified by ANSI T1.107, Bell Communications Research TR-TSY-000009 and ITU-T Rec. G.747. PM5366 supports bit asynchronous or byte synchronous mapping and demapping of 84 T1s or 63 E1s into SONET/SDH as specified by ANSI T1.105,
Bell Communications Research GR-253-CORE and ITU-T Recommendation G.707. The TEMAP-84 PM5366 also supports mapping of 63 T1s into SDH via TU-12s. Up to 84 Transparent VT1.5s and TU-11s or 63 Transparent VT2s of PM5366 and TU-12s can be transferred between the SONET/SDH interface and the SBI bus interface.

PM5366 can also be configured as a DS3 or E3 framer, providing external access to the full DS3 or E3 payload, or a VT/TU mapper, providing access to unframed 1.544 Mbit/s and 2.048 Mbit/s links.

The TEMAP-84 PM5366 can be used as a SONET/SDH VT/TU mapper or M13 multiplexer with performance monitoring in either the ingress or egress direction for up to 84 T1s or 63 E1s.

Each of the T1 and E1 jitter attenuators of PM5366 and performance monitors is independently software configurable, allowing timing master and feature selection without changes to external wiring. 1.544 Mbit/s and 63 2.048 Mbit/s tributaries may be mixed at a VC-3/TUG-3/DS3 granularity.

In the ingress direction of PM5366, each of the 84 T1 links is either demultiplexed from a channelized DS3 or extracted from SONET VT1.5, TU-11 or TU-12 mapped bus. Each T1 performance monitor can be configured to frame to the common DS1 signal formats (SF, SLC96, ESF).

T1 performance monitoring of PM5366 with accumulation of CRC-6 errors, framing bit errors, out-of-frame events, and changes of frame alignment is provided. . The TEMAP-84 also detects the presence of ESF bit oriented codes, and detects and
terminates HDLC messages on the ESF data link. The HDLC messages are terminated in a 128 byte FIFO.