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PM4354

Features: • Monolithic device that integrates four T1/E1 framers and line interfaces for shorthaul and longhaul applications.• Software selectable between T1/J1 and E1 operation on a per device basis.• Provides digitally programmable longhaul and shorthaul pulse templates and lin...

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SeekIC No. : 004463619 Detail

PM4354: Features: • Monolithic device that integrates four T1/E1 framers and line interfaces for shorthaul and longhaul applications.• Software selectable between T1/J1 and E1 operation on a per...

PM4354 Data Sheet

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Part Number:
PM4354
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/25

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Product Details

Description



Features:

• Monolithic device that integrates four T1/E1 framers and line interfaces for shorthaul and longhaul applications.
• Software selectable between T1/J1 and E1 operation on a per device basis.
• Provides digitally programmable longhaul and shorthaul pulse templates and line build out.
• Meets or exceeds T1/J1 and E1 shorthaul and longhaul network access specifications including ANSI T1.102, T1.403, T1.408, AT&T TR 62411, ITUT G.703, G.704 as well as ETSI 300- 011, CTR-4, CTR-12 and CTR-13.
• Provides encoding and decoding of B8ZS, HDB3 and AMI line codes.
• Provides receive equalization, clock recovery and line performance monitoring.
• Provides transmit and receive jitter attenuation.
• Provides four full-featured HDLC controllers, each with 128-byte transmit and receive FIFO buffers.
• Provides a two-frame payload slip buffer to allow independent backplane and line timing.
• Automatically generates and transmits DS-1 performance report messages to ANSI T1.231 and ANSI T1.408 specifications.
• Provides PRBS generators and detectors on each tributary for error testing at DS1, E1 and N x 64 Kbit/s rates as recommended in ITU-T O.151 and O.152.
• Provides an 8-bit microprocessor bus interface for configuration, control, and status monitoring.
• Uses line rate system clock.
• Provides an IEEE P1149.1 (JTAG) compliant test access port (TAP) and controller for boundary scan test.
• Implemented in a low power 2.5/3.3 V CMOS technology.
• Available in a high density 208-pin fine pitch PBGA (17 mm by 17 mm) package.
• Provides a -40 °C to +85 °C industrial temperature operating range.


Application

• Wireless Base Transceiver Station and Digital Loop Carrier (DLCs).
• Enterprise Router.
• DSLAM.
• APON Optical Network Unit (ONU).
• Integrated Access Device (IAD).
• Voice Gateway.
• Channel and Data Service Units (CSU/DSU).
• Digital Private Branch Exchanges (PBX).
• Test Equipment.


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