PM4318

• Monolithic device which integrates eight T1/J1 or E1 short haul and long haul line interface circuits.
• Software switchable between T1/J1 and E1 operation on a per-device basis.
• Meets or exceeds T1/J1 and E1 shorthaul and longhaul network access specifications including ANSI T1.102, T1.403, T1.408, AT&T TR 62411, ITU-T G.703, G.704 as well as ETSI 300-011, CTR-4, CTR- 12 and CTR-13.
• Provides encoding and decoding of B8ZS, HDB3 and AMI line codes.
• Provides receive equalization, clock recovery and line performance monitoring.
• Provides transmit and receive jitter attenuation.
• Provides digitally programmable long haul and short haul line build out.
• Provides a selectable, per channel independent de-jittered T1 or E1 recovered clock for system timing and redundancy.
• Provides PRBS generators and detectors on each tributary for error testing at DS1 and E1 rates as recommended in ITU-T O.151.
• Provides either serial clock/data or parallel Scaleable Bandwidth Interconnect (SBI) interfaces on the system side.
• Can be configured to act as a converter between the SBI interfaces and serial clock/data. In this mode, the LIUs are unused.
• Provides an 8-bit microprocessor bus interface for configuration, control, and status monitoring.
• Provides a hardware-only (no microprocessor) mode in which configuration data is read from an SPIcompatible serial PROM. The PROM interface can be cascaded such that multiple OCTLIU devices can be configured simultaneously from a single PROM.
• Uses line rate system clock.
• Provides an IEEE 1149.1 (JTAG) compliant Test Access Port (TAP) and controller for boundary scan test.
• Implemented in a low power 3.3 V tolerant 1.8/3.3 V CMOS technology.
• Available in a high density 288-pin Tape-SBGA (23 mm by 23 mm) package.
• Provides a 40°C to +85°C Industrial temperature operating range.

The PM4318 Octal E1/T1/J1 Line Interface Device (OCTLIU) is a monolithic integrated circuit suitable for use in long haul and short haul T1, J1 and E1 systems with a minimum of external circuitry. The OCTLIU is configurable via microprocessor control or SPI-compatible serial PROM interface, allowing feature selection without changes to external wiring.

Analogue circuitry of  PM4318 is provided to allow direct reception of long haul E1 and T1 compatible signals with up to 36 dB cable loss (at 1.024 MHz) in E1 mode or up to 36 dB cable loss (at 772 kHz) in T1 mode using a minimum of external components. Typically, only line protection, a transformer and a line termination resistor are required.

The OCTLIU recovers clock and data from the line. Decoding of AMI, HDB3 and B8ZS line codes is supported. In T1 mode, the OCTLIU also detects the presence of in-band loop back codes. The OCTLIU supports detection of loss of signal, pulse density violation and line code violation alarm conditions. Line code violations are accumulated for performance monitoring purposes.

Internal analogue circuitry of PM4318 allows direct transmission of long haul and short haul T1 and E1 compatible signals using a minimum of external components. Typically, only line protection, a transformer and an optional line termination resistor are required. Digitally programmable pulse shaping allows transmission of DSX-1 compatible signals up to 655 feet from the cross-connect, E1 short haul pulses into 120 ohm twisted pair or 75 ohm coaxial cable, E1 long haul pulses into 120 ohm twisted pair as well as long haul DS-1 pulses into 100 ohm twisted pair with integrated support for LBO filtering as required by the FCC rules. In addition, the programmable pulse shape extending over 5-bit periods allows customization of short haul and long haul line interface circuits to application requirements.

Each channel of the OCTLIU can generate a low jitter transmit clock from the input clock source and also provide jitter attenuation in the receive path. A low jitter recovered T1 clock can be routed outside the OCTLIU for network timing applications.

Serial PCM interfaces to each T1/E1 LIU allow 1.544 Mbit/s or 2.048 Mbit/s backplane receive/backplane transmit system interfaces to be directly supported. Data may be transferred either as dual rail line pulses or single rail DS-1/E1 data. Alternatively, the OCTLIU supports an 8-bit parallel SBI interface for interfacing to high-density framers.

The OCTLIU PM4318 may be configured to operate in a mode in which the LIUs are disabled and the device acts as a converter between the SBI interface and serial clock and data. Up to 8 serial data streams (sharing a common clock and frame pulse) may be mapped on to the SBI bus in this mode.

The OCTLIU PM4318 may be configured, controlled and monitored via a generic 8-bit microprocessor bus through which all internal registers are accessed. Alternatively, the device may be operated in a 'hardware only' mode in which no microprocessor is required. In this case, the OCTLIU reads configuration information from an SPI-compatible serial PROM interface on power up. Multiple OCTLIUs can be configured from a single serial PROM via a cascade interface on the OCTLIU.