PLQ20R8-5

The Signetics PLQ20XX family consists of ultra high-speed 5ns versions of Series 24 PAL devices. The PLQ20XX family is 100% functional and pin-compatible with the 20L8, 20R8, 20R6, and 20R4 series devices. The sum of products (AND-OR)architecture is comprised of 64 AND gates and 8 fixed OR gates. Multiple bidirectional pins provide variable inputioutput pin ratios- Individual 3-State control of all outputs and registers with feedback (R8, R6, R4) is also provided. Proprietary designs can be protected by programming the security fuse.The PLQ20R8, R6, and R4 have D-type flip-flops which are loaded on the Low-to-High transition of the clock input. In order to facilitate state machine design and testing, a power-up reset function has been incorporated into these devices to reset all internal registers to active-Low after a specific period ot time.

The Signetics State-of-the-Art BiCMOS process, known as QUBiC, has been employed to achieve higher levels of operating performance for the PLQ200X family of PLDs. The QUBiG transistcrs have been optimized to provide two-lhirds more speed at less than half the power consumed from products using our last generation of bipolar technology. QUBiC reduces onachip delays and provides high output drive currents while consuming power at very low levels. The PLQRDXX family of devices are field programmable, enabling the user to quickly generate custom pattems using standard programming equipment. See the programmer chart for qualified programmers.  The SLICE software package from Signetics supports easy design entry for the PLQ20XX series as well as other PLD devices from Signetics. The PLQ20XX series are also supported by other standard GAD tools for PAL-type devices. Order codes are listed in the Ordering Information table.

The features of these PLQ20XX family(PLQ20R8-5) are ultra high-speed (tPD = 5ns and fmax =118MHz, 100% functionally and pin-for-pin compatible with industry standard 24-pin PALICs, power-up reset function to enhance state machine design and testability, design support provided via SLICE and other GAD tools for Series 24 PAL devices, field-programmable on industry standard programmers, security fuse, individual 3-State control of all outputs, register preload for testability, power-up 3-State, 24-Pin DIP and 28-Pin PLCC.