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PLL520-80

Features: • 19MHz to 65MHz fundamental crystal input.• Output range: 9.5MHz 65MHz• Complementary outputs: PECL or LVDS output.• Selectable OE Logic (enable high or enable low).• Available outputs: PECL, LVDS, or CMOS (High Drive (30mA) or Standard Drive (10mA) output...

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SeekIC No. : 004463350 Detail

PLL520-80: Features: • 19MHz to 65MHz fundamental crystal input.• Output range: 9.5MHz 65MHz• Complementary outputs: PECL or LVDS output.• Selectable OE Logic (enable high or enable lo...

PLL520-80 Data Sheet

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Part Number:
PLL520-80
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/25

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Product Details

Description



Features:

• 19MHz to 65MHz fundamental crystal input.
• Output range: 9.5MHz 65MHz
• Complementary outputs: PECL or LVDS output.
• Selectable OE Logic (enable high or enable low).
• Available outputs: PECL, LVDS, or CMOS (High Drive (30mA) or Standard Drive (10mA) output).
• Integrated variable capacitors.
• Supports 2.5V or 3.3V Power Supply.
• Available in die form.




Specifications

PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
VDD
4.6
V
Input Voltage, dc
VI
-0.5
VDD+0.5
V
Output Voltage, dc
VO
-0.5
VDD+0.5
V
Storage Temperature
TS
-65
150
Ambient Operating Temperature*
TA
-40
85
Junction Temperature
TJ
125
Lead Temperature (soldering, 10s)
260
ESD Protection, Human Body Model
2
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied.

* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.




Description

The PLL520-80 is a VCXO IC specifically designed to work with fundamental crystals between 19MHz and 65MHz. The selectable divide by two feature extends the operation range from 9.5MHz to 65MHz. PLL520-80 requires very low current into the crystal resulting in better overall stability. The OE logic feature allows selection of enable high or enable low. Furthermore, it provides selectable CMOS, PECL or LVDS outputs






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