PIC24FJ128GA

Special Microcontroller Features:
• Operating Voltage Range of 2.0V to 3.6V
• Flash Program Memory with 1,000 (typical) Erase/Write Cycle Endurance
• Self-Reprogrammable under Software Control
• Selectable Power Management modes:
- Sleep, Idle and Alternate Clock modes
• Fail-Safe Clock Monitor operation:
- Detects clock failure and switches to on-chip, low-power RC oscillator
• On-Chip LDO Regulator
• JTAG Boundary Scan and Programming Support
• Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)
• Flexible Watchdog Timer (WDT) with On-Chip, Low-Power RC Oscillator for reliable operation
• In-Circuit Serial Programming™ (ICSP™) and In-Circuit Emulation (ICE) via 2 pins

Analog Features:
• 10-bit, up to 16-channel Analog-to-Digital Converter (A/D):
- 500 ksps conversion rate
- Conversion available during Sleep and Idle
• Dual Analog Comparators with Programmable Input/Output Configuration

Peripheral Features:
• Two 3-wire/4-wire SPI™ modules, supporting
4 Frame modes with 4-level FIFO Buffer
• Two I2C™ modules support Multi-Master/Slave mode and 7-bit/10-bit Addressing
• Two UART modules:
- Supports RS-232, RS-485 and LIN 1.2
- Supports IrDA^® with on-chip hardware endec
- Auto-Wake-up on Start bit
- Auto-Baud Detect
- 4-level FIFO buffer
• Parallel Master Slave Port (PMP/PSP):
- Supports 8-bit or 16-bit data
- Supports 16 address lines
• Hardware Real-Time Clock/Calendar (RTCC):
- Provides clock, calendar and alarm functions
• Five 16-bit Timers/Counters with Programmable prescaler
• Five 16-bit Capture Inputs
• Five 16-bit Compare/PWM Outputs
• High-Current Sink/Source on select I/O pins: 18 mA/18 mA
• Configurable Open-Drain Output on Digital I/O pins
• Up to 5 External Interrupt Sources

Ambient temperature under bias................................................................................-40°C to +125°C
Storage temperature ............................................................................................... -65°C to +150°C
Voltage on V_DD with respect to V_SS ............................................................................... -0.3V to +4.0V
Voltage on any combined analog and digital pin and MCLR, with respect to V_SS...-0.3V to (VDD + 0.3V)
Voltage on any digital-only pin with respect to V_SS ......................................................... -0.3V to +6.0V
Voltage on VDDCORE with respect to V_SS ....................................................................... -0.3V to +3.0V
Maximum current out of V_SS pin ..................................................................................................300 mA
Maximum current into V_DD pin (Note 1)........................................................................................250 mA
Maximum output current sunk by any I/O pin..................................................................................25 mA
Maximum output current sourced by any I/O pin ............................................................................25 mA
Maximum current sunk by all ports ...............................................................................................200 mA
Maximum current sourced by all ports (Note 1)..............................................................................200 mA

Note 1: Maximum allowable current is a function of device maximum power dissipation (see Table 26-2).