PI49FCT804T

Features:

` Low output skew: 0.8ns
` Clock busing with Hi-Z state control
` TTL input and output levels, reducing problematic ground bounce"
` High output drive, IOL = 64mA
` Extremely low static power (1mW, typ.)
` Hysteresis on all inputs
` Packages available:16-pin 300 mil wide plastic SOIC (S)16-pin 150 mil wide QSOP (Q)




Pinout






Specifications

Product Specs: Voltage: 5V Function: Buffer, Driver Jitter: - Skew: 800ps Speed: 50MHz I/O: CMOS Temp: Com Outputs: 4+4 Pins: 16 Packages: QSOP (Q16)SOIC (S16) Pb-Free and Green: No - more info RoHS Material Declarations: Not Available

Above which the useful life may be impaired. For user guidelines, not tested.

Storage Temperature ........................................................ 65°C to +150°C
Ambient Temperature with Power Applied ........................... 0°C to +70°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .. 0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) 0.5V to +7.0V
DC Input Voltage .................................................................0.5V to +7.0V
DC Output Current .......................................................................... 120mA
Power Dissipation ...............................................................................0.5W

Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

Description

PI49FCT804T: 5V, 50MHz Dual 1:4 Output Clock Driver

Pericom Semiconductor's PI49FCT series of logic circuits are produced using the Company's advanced 0.8 micron CMOS technology, achieving industry leading speed grades. The PI49FCT804T is a non-inverting clock driver designed with two independent groups of buffers. These buffers have Hi-Z state Output Enable inputs (active LOW) with a 1-in, 4-out configuration per group. Each clock driver consists of two banks of drivers, driving four outputs each from a standard TTL compatible CMOS input.