Features: • Digital to Analogue conversion (transmit pulse)• Output buffering• Analogue to digital conversion• Detection of signal on the line• Master clock generation by PLL• P-MQFP-64 Package• Compliant to ANSI T1.601 (1992), ETSI ETR 080 (1995)• J...
PEF24902: Features: • Digital to Analogue conversion (transmit pulse)• Output buffering• Analogue to digital conversion• Detection of signal on the line• Master clock generation ...
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Parameter |
Limit Values |
Unit | |
min. |
max. | ||
positive Supply Voltage |
7.0 |
v | |
Voltage applied at any input |
-0.3 |
VDD + 0.3 max. 7.0 |
v |
Voltage applied at at the line port outputs |
-0.3 |
VDD + 0.3 max. 7.0 |
v |
Voltage between GNDx to any other GNDx |
0.3 |
||
Voltage between VDDx to any other VDDx |
0.3 |
v | |
Maximum surge Voltage applied at the line port inputs |
ESD hardness according to MIL-Standard 883d Method 3015.7 |