Features: • Low Voltage, Ultra Low Power Operation- Vcc = 2.7 to 3.6 V- Icc = 5 µA (typical) at standby- Icc = 1.5 mA (typical) at 1 MHz- Meets JEDEC LV Interface Spec (JESD8-B)- 5 Volt tolerant inputs and I/O's• CMOS Electrically Erasable Technology- Superior factory testing- Re...
PEEL22LV10AZ-25: Features: • Low Voltage, Ultra Low Power Operation- Vcc = 2.7 to 3.6 V- Icc = 5 µA (typical) at standby- Icc = 1.5 mA (typical) at 1 MHz- Meets JEDEC LV Interface Spec (JESD8-B)- 5 Volt ...
SeekIC Buyer Protection PLUS - newly updated for 2013!
268 Transactions
All payment methods are secure and covered by SeekIC Buyer Protection PLUS.
Features: · Ultra Low Power Operation- VCC = 5 Volts ±10%- Icc = 10 µA (typical) at standby-...
Features: High Speed/Low Power- Speeds ranging from 7ns to 25ns- Power as low as 30mA at 25MHzElec...
Symbol | Parameter | Conditions | Rating | Unit |
VCC | Supply Voltage | Relative to Ground | -0.5 to + 6.0 | V |
VI, VO | Voltage Applied to Any Pin2 | Relative to Ground1 | -0.5 to 5.5 | V |
IO | Output Current | Per Pin (IOL, IOH) | ±25 | °C |
TST | Storage Temperature | -65 to +150 | °C | |
TLT | Lead Temperature | Soldering 10 Seconds | +300 | °C |
The PEEL22LV10AZ is a Programmable Electrically Erasable Logic (PEEL) SPLD (Simple Programmable Logic Device) that operates over the supply voltage range of 2.7V-3.6V and features ultra-low, automatic "zero" power-down operation. The PEEL22LV10AZ is logically and functionally similar to ICT's 5V PEEL22CV10A and PEEL22CV10AZ. The "zero power" (25 µA max. ICC) power-down mode makes the PEEL22LV10AZ ideal for a broad range of batterypowered portable equipment applications, from handheld meters to PCMCIA modems. EEreprogrammability provides both the convenience of product fast reprogramming for product development and quick personalization in manufacturing, including Engineering Change Orders.
The differences between the PEEL22LV10AZ and PEEL22CV10A include the addition of programmable clock polarity, p-term clock, and Schmitt trigger input buffers on all inputs, including the clock. Schmitt trigger inputs allow direct input of slow signals such as biomedical and sine waves or clocks. Like the PEEL22CV10A, the PEEL22LV10AZ is a pin and JEDEC compatible, logical superset of the industry standard PAL22V10 SPLD Figure 1. The PEEL22LV10AZ provides additional architectural features that allow more logic to be incorporated into the design. The PEEL22LV10AZ architecture allows it to replace over twenty standard 24-pin DIP, SOIC, TSSOP and PLCC packages.