PEB2030

PEB2030 is a type of frame aligner circuit(FRAC) which has many unique features: The first one is detection of frame alignment signals for PCM 30 highways in accordance with CCITT recommendations G 737, 738,739. The second one is delay compensation and clock alignment between transmission line and exchange. The third one is compensation of Phase jitter up to 60 us . The forth one is detection and initiation of Route Alarms. The fifth one is loss of frame alignment indicator. The sixth one is slip detection. The seventh one is error simulation for test purposes. The eigth  one is digital interface, TTL-compatible. The last one is NMOS.

There are some absolute maximum ratings about PEB2030. Input voltage(Vi) is -0.3 V to +7.0 V. Supply voltage(V_DD) is -0.3 V to +7.0 V. Operating temperature(Ta) is 0 to 70.Storage tempeprature(Tstg) is -55 to +125. Total power consumption(Ptot) is 400 mW.Otherwise,there are also some electrical charactersitics about it when Ta is 25. Supply voltage(V_DD) is 4.75 V min, 5 V typ and 5.25 V max. Supply current(IS) is 50 mA typ and 70 mA max.. Input currrent(I_IL) is 50 uA min and 200 uA max. H input voltage(V_IH) is 2.4 V min. L inout voltage(V_IL) is 0.7 V max. L output voltage(VOL) is 0.4 V max. H output voltage(V_OH) is 2.7 V min. H output current(Bi,P)(IOH) is -0.05 mA max. H output current(FP,SO,SP)(I_OH) is -0.02 mA max. L output current(FP,SO,SP,1Bi,P)(I_OL) is 0.46 mA max. H output current(DBi)(I_OH) is -0.04 mA max. L output current(DBi) (I_OL) is 0.9 mA max.Besides, there are also some timing specifications about it. Input H-L transfer time(t_HL) is 20 ns max. Input L-H transfer time(t_LH) is 20 ns max. Setup time(t_S) is 150 ns min. Hold time(t_H) is 40 ns min.

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