PDU14F

· Digitally programmable in 16 delay steps
· Monotonic delay-versus-address variation
· Two separate outputs: inverting & non-inverting
· Precise and stable delays
· Input & outputs fully TTL interfaced & buffered
· 10² T L fan-out capability
· Fits standard 24-pin DIP socket
· Auto-insertable

The PDU14F-series device is a 4-bit digitally programmable delay line.The delay, TDA, from the input pin (IN) to the output pins (OUT, OUT/) epends on the address code (A3-A0) according to the following formula:

TD_A  = TD₀  +  T_INC * A

where A is the address code, T_INC is the incremental delay of the PDU14F, nd TD0 is the inherent delay of the device.  The incremental delay is and TD0 is the inherent delay of the device.  The incremental delay is pecified by the dash number of the PDU14F and can range from 0.5ns through 100ns, inclusively.  The nable pins (EN/) are held LOW during normal operation.  These pins must always be in the same state nd may be tied together externally.  When these signals are brought HIGH, OUT and OUT/ are forced nto LOW and HIGH states, respectively.  The address is not latched and must remain asserted during ormal operation.