PCI1520-EP

The PCI1520-EP supports the following features:
• Controlled Baseline
  One Assembly/Test Site, One Fabrication Site
• Extended Temperature Performance of 40°C to 85°C
• Enhanced Diminishing Manufacturing Sources (DMS) Support
• Enhanced Product-Change Notification
• Qualification Pedigree†
• A 209-terminal MicroStar BGA^TM ball-grid array (GHK) package
• 2.5-V core logic and 3.3-V I/O with universal PCI interfaces compatible with 3.3-V and 5-V PCI signaling environments
• Integrated low-dropout voltage regulator (LDO-VR) eliminates the need for an external 2.5-V power supply

† Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

• Mix-and-match 5-V/3.3-V 16-bit PC Cards and 3.3-V CardBus Cards
• Two PC Card or CardBus slots with hot insertion and removal
• Serial interface to TI^TM TPS222X dual-slot PC Card power switch
• Burst transfers to maximize data throughput with CardBus Cards
• Interrupt configurations: parallel PCI, serialized PCI, parallel ISA, and serialized ISA
• Serial EEPROM interface for loading subsystem ID and subsystem vendor ID
• Pipelined architecture for greater than 130-Mbps throughput from CardBus-to-PCI and from PCI-to-CardBus
• Up to five general-purpose I/Os
• Programmable output select for CLKRUN
• Multifunction PCI device with separate configuration space for each socket
• Five PCI memory windows and two I/O windows available for each 16-bit interface
• Two I/O windows and two memory windows available to each CardBus socket
• Exchangeable-card-architecture- (ExCA-) compatible registers are mapped in memory and I/O space
• Intel 82365SL-DF and 82365SL register compatible
• Ring indicate, SUSPEND, PCI CLKRUN, and CardBus CCLKRUN
• Socket activity LED terminals
• PCI bus lock (LOCK)
• Advanced quarter-micron, ultralow-power CMOS technology
• Internal ring oscillator

Supply voltage range, V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . 0.5 V to 4.6 V
Clamping voltage range, V_CCP, V_CCA, V_CCB . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . 0.5 V to 6 V
Input voltage range, V_I: PCI, miscellaneous . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to V_CCP + 0.5 V
                                      Card A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . 0.5 to V_CCA + 0.5 V
                                      Card B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . 0.5 to V_CCB + 0.5 V
                                      Fail safe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . 0.5 V to _VCC + 0.5 V
Output voltage range, V_O: PCI, miscellaneous . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to V_CCP + 0.5 V
                                          Card A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . 0.5 to V_CCA + 0.5 V
                                          Card B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 0.5 to V_CCB + 0.5 V
                                          Fail safe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . 0.5 V to V_CC + 0.5 V
Input clamp current, I_IK (V_I < 0 or V_I > V_CC) (see Note 1) . . . . . . . . . . . . . . . . .  . . . . . . .  . . . . ±20 mA
Output clamp current, I_OK (V_O < 0 or V_O > V_CC) (see Note 2) . . . . . . . . . . . . . . . . . . . . .  . . . . . ±20 mA
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . 65°C to 150°C

† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. Applies for external input and bidirectional buffers. V_I > V_CC does not apply to fail-safe terminals. PCI terminals and miscellaneous terminals are measured with respect to V_CCP instead of V_CC. PC Card terminals are measured with respect to V_CCA or V_CCB. The limit specified applies for a dc condition.
2. Applies for external output and bidirectional buffers. V_O > V_CC does not apply to fail-safe terminals. PCI terminals and miscellaneous terminals are measured with respect to V_CCP instead of V_CC. PC Card terminals are measured with respect to V_CCA or V_CCB. The limit specified applies for a dc condition.

The Texas Instruments PCI1520, a 208-terminal dual-slot CardBus controller designed to meet the PCI Bus Power Management Interface Specification for PCI to CardBus Bridges, is an ultralow-power high-performance PCI-to-CardBus PCI1520-EP that supports two independent card sockets compliant with the PC Card Standard (rev. 7.1). The PCI1520 provides features that make PCI1520-EP the best choice for bridging between PCI and PC Cards in both notebook and desktop computers. The 1997 PC Card Standard retains the 16-bit PC Card specification defined in PCI Local Bus Specification and defines the new 32-bit PC Card, CardBus, capable of full 32-bit data transfers at 33 MHz. The PCI1520 supports any combination of 16-bit and CardBus PC Cards in the two sockets, powered at 5 V or 3.3 V, as required.

The PCI1520 is compliant with the PCI Local Bus Specification, and PCI1520-EP PCI interface can act as either a PCI master device or a PCI slave device. The PCI bus mastering is initiated during CardBus PC Card bridging transactions. The PCI1520 is also compliant with PCI Bus Power Management Interface Specification (rev. 1.1).

All card signals are internally buffered to allow hot insertion and removal without external buffering. The PCI1520 is register-compatible with the Intel 82365SL-DF and 82365SL ExCA controllers. The PCI1520 internal data path logic allows the host to access 8-, 16-, and 32-bit cards using full 32-bit PCI cycles for maximum performance. Independent buffering and a pipeline architecture provide an unsurpassed performance level with sustained bursting. The PCI1520 can also be programmed to accept fast posted writes to improve system-bus utilization.

Multiple system-interrupt signaling options are provided, including parallel PCI, parallel ISA, serialized ISA, and serialized PCI. Furthermore, general-purpose inputs and outputs are provided for the board designer PCI1520-EP to implement sideband functions. Many other features designed into the PCI1520, such as socket activity light-emitting diode (LED) outputs, are discussed in detail throughout the design specification.

An advanced complementary metal-oxide semiconductor (CMOS) process PCI1520-EP achieves low system power consumption while operating at PCI clock rates up to 33 MHz. Several low-power modes enable the host power management system to further reduce power consumption.