Features: · 80C51 ports P0, P1, P2 and P3 available for interfacing o display, keyboard, I2C-bus, interrupt sources and/or xternal memory. Integrated 64 kbyte ROM, 3 kbytes of ata memory and 1 kbyte SDR-RAM. External program emory is addressable up to 128 kbytes· +2.7 to +5 V port (P0 to P3) inter...
PCD5091: Features: · 80C51 ports P0, P1, P2 and P3 available for interfacing o display, keyboard, I2C-bus, interrupt sources and/or xternal memory. Integrated 64 kbyte ROM, 3 kbytes of ata memory and 1 kbyte...
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The PCD5091 is designed for GAP-compliant handsets ith speaker-phone option. PCD5091 has an embedded 80C51 icrocontroller with twice the performance of the classic rchitecture, 64 kbytes of PROM program memory and kbytes of data memory on-chip. In addition there is kbyte of on-chip data memory that is shared with on-chip urst Mode Logic (BML) and DSP, the System Data RAM SDR).