PCA9517

The PCA9517 is a CMOS integrated circuit that provides levelshifting between low voltage (down to 0.9 V) and higher voltage(2.7 V to 5.5 V) I2C or SMBus applications. While retaining all theoperating modes and features of the I2C system during the levelshifts, it also permits extension of the I2C-bus by providingbi-directional buffering for both the data (SDA) and the clock (SCL)lines, thus enabling two buses of 400 pF. Using the PCA9517enables the system designer to isolate two halves of a bus for bothvoltage and capacitance. The SDA and SCL pins are over voltagetolerant and are high-impedance when the PCA9517 is unpowered.

The 2.7 V to 5.5 V bus B side drivers of PCA9517 behave much like the driverson the PCA9515A device while the adjustable voltage bus A sidedrivers drive more current and eliminate the static offset voltage.

PCA9517 results in a LOW on the B side translating into a nearly 0 VLOW on the A side which accommodates smaller voltage swings oflower voltage logic.

The static offset design of the B side PCA9517 I/O drivers preventthem from being connected to another PCA9510, PCA9511, PCA9512,PCA9513, PCA9514, PCA9515A, PCA9516A, PCA9517 (B side), orPCA9518. The A side of two or more PCA9517s can be connectedtogether, however, to allow a star topography with the A side on thecommon bus, and the A side can be connected directly to any otherbuffer with static or dynamic offset voltage. Multiple PCA9517s canbe connected in series, A side to B side, with no build-up in offsetvoltage with only time of flight delays to consider.

The PCA9517 drivers are not enabled unless VCCA is above 0.8 Vand VCC is above 2.5 V. The EN pin can also be used to turn thedrivers on and off under system control. Caution should be observedto only change the state of the enable pin when the bus is idle