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PC7410

Features: • 22.8 SPECint95 (estimated), 17SPECfp95 at 500 MHz (estimated)• 917MIPS at 500 MHz• Selectable Bus Clock (14 CPU Bus Dividers Up To 9x)• Seven Selectable Core-to-L2 Frequency Divisors• Selectable 603 Interface Voltage Below 3.3V (1.8V, 2.5V)• Selectab...

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SeekIC No. : 004456041 Detail

PC7410: Features: • 22.8 SPECint95 (estimated), 17SPECfp95 at 500 MHz (estimated)• 917MIPS at 500 MHz• Selectable Bus Clock (14 CPU Bus Dividers Up To 9x)• Seven Selectable Core-to-L...

PC7410 Data Sheet

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Part Number:
PC7410
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• 22.8 SPECint95 (estimated), 17SPECfp95 at 500 MHz (estimated)
• 917MIPS at 500 MHz
• Selectable Bus Clock (14 CPU Bus Dividers Up To 9x)
• Seven Selectable Core-to-L2 Frequency Divisors
• Selectable 603 Interface Voltage Below 3.3V (1.8V, 2.5V)
• Selectable L2 interface of 1.8V or 2.5V
• PD Typical 5.3W at 500 MHz, Full Operating Conditions
• Nap, Doze and Sleep Modes for Power Saving
• Superscalar (Four Instructions fetched per Clock Cycle)
• 4 GB Direct Addressing Range
• Virtual Memory: 4 hexabytes (252)
• 64-bit Data and 32-bit Address Bus Interface
• 32 KB Instruction and Data Cache
• Eight Independent Execution Units and Three Register Files
• Write-back and Write-through Operations
• fINT Max = 450 MHz 500 MHz
• fBUS Max = 133 MHz


Specifications

Symbol Characteristic Value Unit
VDD Core supply voltage -0.3 to 2.1(4) V
AVDD PLL supply voltage -0.3 to 2.1(4) V
L2AVDD L2 DLL supply voltage

-0.3 to 2.1(4)

 V
OVDD 60x bus supply voltage -0.3 to 3.465(3)(6) V
L2OVDD L2 bus supply voltage -0.3 to 2.6(3) V
VIN Processor bus input voltage -0.3 to OVDD + 0,2V(2)(5) V
VIN L2 bus input voltage -0.3 to L2OVDD + 0,2V(2)(5) V
VIN JTAG signal input voltage -0.3 to OVDD + 0,2V V
TSTG Storage temperature range -55 to 150 °C
  Rework temperature 260 °C

Notes:
1. Functional and tested operating conditions are given in Table 4. Absolute maximum ratings are stress ratings only. Stresses beyond those listed may affect device reliability or cause permanent damage to the device.
2. Caution: VIN must not exceed OVDD or L2OVDD by more than 0.2V at any time including during power-on reset.
3. Caution: L2OVDD/OVDD must not exceed VDD/AVDD/L2AVDD by more than 2.0V at any time including during power-on reset; this limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences.
4. Caution: VDD/AVDD/L2AVDD must not exceed L2OVDD/OVDD by more than 0.4V at any time including during power-on reset; this limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences.
5. VIN may overshoot/undershoot to a voltage and for a maximum duration as shown in Figure 3.
6. PC7410RXnnnLE (Rev 1.4) and later only. Previous revisions do not support 3.3V OVDD and have a maximum value OVDD of -0.3 to 2.6V.




Description

The PC7410 is the second microprocessor that uses the fourth (G4) full implementation of the PowerPC™ Reduced Instruction Set Computer (RISC) architecture. It is fully JTAG-compliant.

The PC7410 maintains some of the characteristics of G3 microprocessors:
• The design is superscalar, capable of issuing three instructions per clock cycle into eight independent execution units
• The microprocessor provides four software controllable power-saving modes and a thermal assist unit management
• The microprocessor has separate 32-Kbyte, physically-addressed instruction and data caches with dedicated L2 cache interface with on-chip L2 tags

In addition, the PC7410 integrates full hardware-based multiprocessing capability, including a 5-state cache coherency protocol (4 MESI states plus a fifth state for shared intervention) and an implementation of the new AltiVec™ technology instruction set.

New features of PC7410 have been developed to make latency equal for double-precision and single-precision floating-point operations involving multiplication. Additionally, in memory subsystem (MSS) bandwidth, the PC7410 offers an optional, high-bandwidth MPX bus interface.

Unlike the PC7400, the PC7410 does not support the 3.3V I/O on the L2 cache interface.




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