P89V51RD2

 80C51 Central Processing Unit
 5 V Operating voltage from 0 to 40 MHz
 64 kB of on-chip Flash program memory with ISP (In-System Programming) and IAP (In-Application Programming)
 Supports 12-clock (default) or 6-clock mode selection via software or ISP
SPI (Serial Peripheral Interface) and enhanced UART
 PCA (Programmable Counter Array) with PWM and Capture/Compare functions
 Four 8-bit I/O ports with three high-current Port 1 pins (16 mA each)
 Three 16-bit timers/counters
Programmable Watchdog timer (WDT)
Eight interrupt sources with four priority levels
 Second DPTR register
 Low EMI mode (ALE inhibit)
 TTL- and CMOS-compatible logic levels

The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM.

A key feature of the P89V51RD2 is its X2 mode option. The design engineer can choose to run the application with the conventional 80C51 clock rate (12 clocks per machine cycle) or select the X2 mode (6 clocks per machine cycle) to achieve twice the throughput at the same clock frequency. Another way to benefit from P89V51RD2 feature is to keep the same performance by reducing the clock frequency by half, thus dramatically reducing the EMI.

The Flash program memory P89V51RD2 supports both parallel programming and in serial In-System Programming (ISP). Parallel programming mode offers gang-programming at high speed, reducing programming costs and time to market. ISP allows P89V51RD2 to be reprogrammed in the end P89V51RD2 under software control. The capability to field/update the application firmware makes a wide range of applications possible.

The P89V51RD2 is also In-Application Programmable (IAP), allowing the Flash program memory to be reconfigured even while the application is running.