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P89LPC908

Features: ·1 kB byte-erasable Flash code memory organized into 256-byte sectors and 16-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.· 128-byte RAM data memory.· Two 16-bit counter/timers. (Timer 0 may be configured to toggle a port output upon timer ov...

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SeekIC No. : 004453751 Detail

P89LPC908: Features: ·1 kB byte-erasable Flash code memory organized into 256-byte sectors and 16-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.· 128-byte RAM data ...

P89LPC908 Data Sheet

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Part Number:
P89LPC908
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

·1 kB byte-erasable Flash code memory organized into 256-byte sectors and 16-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
· 128-byte RAM data memory.
· Two 16-bit counter/timers. (Timer 0 may be configured to toggle a port output upon timer overflow or to become a PWM output on the P89LPC907 device).
· 23-bit system timer that can also be used as a Real-Time clock.
·A single analog comparator with selectable reference source.
·Enhanced UART with fractional baudrate generator, break detect, framing error detection, automatic address detection and versatile interrupt capabilities (P89LPC908, transmit only on P89LPC907).
·Internal RC oscillator option (factory calibrated to ±1 %) allows operation without external oscillator components. The RC oscillator option is selectable and fine tunable.
·2.4 V to 3.6 V VDD operating range with 5 V tolerant I/O pins (may be pulled up or driven to 5.5 V). Supply pins located at package centers for improved supply decoupling and reduced EMI.
· Up to six I/O pins when using internal oscillator and reset options.
· 8-pin SO-8 package.


Pinout

Connection Diagram




Description

The P89LPC906/907/908 are single-chip microcontrollers in low-cost 8-pin packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC906/907/908 in order to reduce component count, board space, and system cost.




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