P89C61X2

Features: 80C51 Central Processing Unit¤ 64 kbytes Flash¤ 512 bytes RAM (P89C60X2)¤ 1024 bytes RAM (P89C61X2)¤ Boolean processor¤ Fully static operationIn-System Programmable (ISP) Flash memory12-clock operation with selectable 6-clock operation (via software or via parallel programmer)Memory addr...

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SeekIC No. : 004453729 Detail

P89C61X2: Features: 80C51 Central Processing Unit¤ 64 kbytes Flash¤ 512 bytes RAM (P89C60X2)¤ 1024 bytes RAM (P89C61X2)¤ Boolean processor¤ Fully static operationIn-System Programmable (ISP) Flash memory12-cl...

floor Price/Ceiling Price

Part Number:
P89C61X2
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/25

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Product Details

Description



Features:

80C51 Central Processing Unit
¤ 64 kbytes Flash
¤ 512 bytes RAM (P89C60X2)
¤ 1024 bytes RAM (P89C61X2)
¤ Boolean processor
¤ Fully static operation
In-System Programmable (ISP) Flash memory
12-clock operation with selectable 6-clock operation (via software or via parallel programmer)
Memory addressing capability
¤ Up to 64 kbytes ROM and 64 kbytes RAM
Power control modes:
¤ Clock can be stopped and resumed
¤ Idle mode
¤ Power-down mode
Two speed ranges
¤ 0 to 20 MHz with 6-clock operation
¤ 0 to 33 MHz with 12-clock operation
LQFP, PLCC, and DIP packages
Dual Data Pointers
Three security bits
Four interrupt priority levels
Six interrupt sources
Four 8-bit I/O ports
Full-duplex enhanced UART
¤ Framing error detection
¤ Automatic address recognition
Three 16-bit timers/counters T0, T1 (standard 80C51) and additional T2 (capture and compare)
Programmable clock-out pin
Watchdog timer
Asynchronous port reset
Low EMI (inhibit ALE,  6-clock mode)
Wake-up from Power Down by an external interrupt



Pinout

  Connection Diagram


Description

The Philips microcontrollers described in this data sheet are high-performance static 80C51 designs. P89C60X2 and P89C61X2 are manufactured in an advanced CMOS process and contain a non-volatile Flash program memory that is programmable in parallel (via a parallel programmer) or In-System Programmable (ISP) via boot loader. They support both 12-clock and 6-clock operation.
The P89C60X2 and P89C61X2 contain 512 bytes RAM and 1024 bytes RAM respectively, 32 I/O lines, three 16-bit counter/timers, a six-source, four-priority level nested interrupt structure, a serial I/O port for either multi-processor communications, I/O expansion or full duplex UART, and on-chip oscillator and clock circuits.
In addition, the P89C60X2 and P89C61X2 are static designs which offer a wide range of operating frequencies down to zero. Two software selectable modes of power reduction !" idle mode and power-down mode  are available. The idle mode freezes the CPU while allowing the RAM, timers, serial port, and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to beinoperative. Since the design is static, the clock can be stopped without loss of user data. Then the execution can be resumed from the point the clock was stopped.




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