OM5730

1.1 SAA7219 features

1.1.1 GENERAL SAA7219 FEATURES 

` Internal PR3930 32-bit RISC processor running at 1 MHz
` Comprehensive driver software and development tool upport
` A JTAG interface for board test support
` 8-kbyte 8-way set associative instruction cache
` 4-kbyte 4-way set associative instruction cache.

1.1.2 MPEG2 SYSTEMS FEATURES

` Parsing of Transport Stream (TS), Philips emiconductors hardware and proprietary software ata streams; maximum input rate is 108 Mbits/s 
A real time descrambler consisting of 3 modules:
A control word bank containing 14 pairs (odd and ven) of control words and a default control word
The Digital Video Broadcasting (DVB) descrambler ore implementing the stream decipher and block ecipher algorithms
The MULTI2 descrambler algorithm implementing he CBC and OFB mode descrambling functions.
` Hardware section filtering based on 32 different Packet dentifiers (PIDs) with a flexible number of filter onditions (8 or 4-byte condition plus 8 or 4-byte mask) er PID and a total filter capacity of 40 (8-byte condition hecks) or up to 80 (4-byte condition checks) filter onditions
` 4 Transport Stream/Packetized Elementary Stream PES) filters for retrieval of data at TS or PES level for pplications such as subtitling, TXT or retrieval of rivate data  Flexible Direct Memory Access (DMA) based storage of he 32 section substreams and 4 TS/PES data ubstreams in the external memory  System time base management with a double counter echanism for clock control and discontinuity handling   Presentation Time Stamp (PTS)/Decoding Time tamp (DTS) timers
` A General Purpose/High speed (GP/HS) filter which can erve as alternative input from e.g. IEEE 1394 devices. it can also output either scrambled or descrambled TS to IEEE 1394 devices.1.1.3 EXTERNAL INTERFACE FEATURES
` A 32-bit microcontroller extension bus supporting DRAM, SDRAM flash, (E)PROM and external memory mapped I/O devices. It also supports a synchronous interface to communicate with the integrated MPEG Audio Video Graphics (AVG) decoder SAA7215 family at 40.5 Mbytes/s.
` An IEEE 1284 interface supporting master and slave modes; usable as a general purpose port
` 2 UART (RS232) data ports with DMA capabilities (187.5 kbits/s) including hardware flow control RXD,TXD, RTS and CTS for modem support
` Two dedicated smart card reader interfaces (ISO 7816 compatible) with DMA capabilities
` Two I2C-bus master/slave transceivers supporting the standard (100 kbits/s) and fast (400 kbits/s) I2C-bus modes
` 32 general purpose, bidirectional I/O interface pins, 8 of which may also be used as interrupt inputs
` 2 Pulse Width Modulated (PWM) outputs with 8-bit esolution.
.2 SAA7215 family features .2.1 GENERAL SAA7215 FAMILY FEATURES
Single or double external synchronousDRAMorganized s 1M ´ 16 or 2 ´ 1M ´ 16 interfacing at 81 MHz. Due to fficient memory use in MPEG decoding, more than  Mbit is available for graphics in the single SDRAM onfiguration whereas 17 Mbits are available in the ouble SDRAM configuration targeted to BSkyB 3.00 nd Canal+ 4.0 specifications.
` Dedicated input for compressed audio and video in PES r ES in byte wide or bit serial format; accompanying strobe signals distinguish between audio and video data
` Optimum compatibility with SAA7219 TMIPS controller
` Flexible memory allocation under control of the external entral Processing Unit (CPU) enables optimized artitioning of memory for different tasks  Boundary scan testing implemented.

1.2.2 CPU RELATED FEATURES

` External SDRAM self test
` Asynchronous interface possible with external microcontroller
` Support of fast DMA transfer
` High speed/low latency interface with second graphics SDRAM
` Byte access to the full SDRAM in the upper 16-Mbit address range
` Fast 16-bit data plus 22-bit address synchronous interface with external controller at up to 40.5 MHz
` Support of Motorola ColdFire and 68xxx interfaces as well as LSI L64108 interface.

1.2.3 MPEG2 SYSTEM FEATURES

` Support for seamless time base change (edition)
` Processing of errors flagged by channel decoding section.

1.2.4 MPEG2 VIDEO FEATURES

` Decoding of MPEG2 video up to main level and main  profile
` Output picture format: CCIR-601 4 : 2 : 2 interlaced pictures; picture format 720 to 576 at 50 Hz or 720 to 480 at 60 Hz
` Support of constant and variable bit rates up to 15 Mbits/s for the elementary stream
` Digital video input/output interface on 8-bit, 27 MHz (CbYCrY multiplexed bus), at a CCIR-656 format
` Analog video output interface on both the RGB and Y/C/CVBS formats (internal digital encoder)
` Horizontal and vertical pan and scan allows the extraction of a window from the coded picture
` Flexible horizontal scaling from 0.5 up to 4 allows easy aspect ratio conversion including support for 2.21 : 1aspect ratio movies; in case of shrinking an anti-aliasing pre-filter is applied
` Vertical scaling with fixed factors 0.5 and 0.75; factor 0.75 is used for letter-box presentation, 1 or 2;factor 0.5 realizes picture shrink
` Factor 2 can be used for up-conversion of pictures with 288 (240) lines or less ` Horizontal and vertical scaling can be combined to scale pictures to 1¤4 their original size, thus freeing up screen space for graphic applications like Electronic Program Guides (EPGs)
` Non full screen MPEG pictures can be displayed in a box of which position and background colour are adjustable by the external microcontroller; structured background is available as part of the graphic features ` Nominal video input buffer size for MP at ML 27-Mbit ` Decoding and presentation can be independently handled under CPU control
` Various trick modes under control of external microcontroller
` Freeze field/frame on I- or P-frames; restart on I-picture ` Freeze field on B-frames; restart at any moment
` Scanning and decoding of I- or I- and P-frames in a IBP sequence
` Single-step mode
` Repeat/skip field for time base correction
` Repeat/skip frame for display parity integrity.

1.2.5 MPEG2 AUDIO FEATURES

` Decoding of 2 channel, layer I and II MPEG audio; support for mono, stereo, intensity stereo and dual channel mode
` Constant and variable bit rates up to 448 kbits/s ` Supported audio sampling frequencies: 48, 44.1, 32, 24, 22.05 and 16 kHz
` Selectable output channel in dual channel mode
` Dynamic range control at output
` Independent channel volume control and programmable
inter-channel crosstalk through a baseband audio processing unit
` Muting possibility via (external) controller; automatic muting in case of errors
` Generation of 'beeps' with programmable tone height, duration and amplitude
` Support for up to 8 channels linear Pulse Code Modulated (PCM) elementary audio streams with 8, 16, 20 and 24 bits/sample and bit rates up to 6.144 Mbits/s
` 96 kHz Linear Pulse Code Modulated (LPCM) samples will be mapped to a 48 kHz multi-channel format
` Volume control for linear PCM samples in three steps: -6, -12 and -18 dB
` Burst-formatting of AC-3 elementary streams and MPEG-2 multi-channel streams in ES or PES format for interconn-ection with an external multi-channel decoder via the digital audio output or the IEC 958 output
` Serial multi-channel digital audio output with 16, 18, 20 or 24 bits/sample, compatible either to I2S or Japanese formats; output can be set to high impedance mode via the external controller
` Serial Sony/Philips Digital Interface (SPDIF) (IEC 958) audio output; output can be set to high-impedance mode.

1.2.6 GRAPHICS FEATURES

` Graphics is presented in boxes independent of video format
` Boxes can be up to full screen allowing double buffer display mechanism
` Two independent graphics planes are available for background and/or graphics overlay
` Two independent data paths with RGB 4 : 4 : 4 and YCbCr 4 : 2 : 2 formats available with independent mixing
` RGB path transparent to YCbCr format
` Screen arrangement of boxes is determined by display list mechanism which allows for multiple boxes, background loading, fast switching, scrolling, overlapping and fading of regions
` Real-time anti-flickering performed in hardware; programmable hardware available for off-line anti-flickering
` Hard-edged or soft-edged wiping of regions available
` Support of 2, 4, 8 and 16 bits/pixel in fixed bit maps format or coded in accordance to the DVB variable/run length standard for region based graphics
` Chrominance down-sampling filter switched per region
` Display colours are obtained via Colour Look-Up Tables (CLUT) or directly from bitmap. CLUT output can be YCbCrT at 8-bit for each signal component thus enabling 16M different colours and 6-bit for T which gives 64 mixing levels with video. CLUT output can also be RGBT with same resolutions. Non-linear processing available by means of LUTs.
` Conversion matrices available to allow any format onany different data path (RGB or YCbCr) ` Graphics boxes may overlap vertically even inside one graphics layer due to the use of flexible chained descriptors
` Internal support for fast 3-D block moves in external SDRAM through Data Manipulation Unit (DMU)
` DMU allows format conversion and bit manipulation from a chained list of instructions
` Graphics mechanism can be used for signal generation in the vertical blanking interval; useful for teletext, wide
screen signalling, closed caption, etc.
` Support for a single down loadable cursor of 1 K pixel with programmable shape
` Supported shapes are 8 ´ 128, 16 ´ 64, 32 ´ 32, 64 ´ 16 and 128 ´ 8 pixels
` Cursor colours obtained via two 16 entry CLUTs with YCbCrT at 6, 4, 4 respectively
` 2 bits and RGBT at 4, 4, 4 respectively 4 bits (or 4, 5, 3, respectively 4 bits); mixing of cursor with video and
graphics in 4 levels` Cursor can be moved freely across the screen without overlapping restrictions.

2.2 Reference design goal

The Philips STB concept OM5730 is a reference design of a complete hardware and software solution intended for
the digital satellite receiver set-top box market. This reference design addresses the potential customer base who is targeting the new world of digital media broadcasting. The reference platform for a set-top box combines the key ICs, the SAA7219 transport MPEG source decoder and the SAA7215 family AVG decoder/video encoder and the  oftware to run a set-top box.

As in many cases a platform is a stepping stone from which evolution and specification enhancements can be launched. The first reference design of the platform contains the necessary functions which demonstrate the performance and capabilities of the system. Enhancements in the ICs as well as for SW modules will be released  during the lifetime of the platform. The convention which has been used is that backwards
compatibility is guaranteed within the platform (STB5000 range).
The main objectives are:
` Firstly providing this complete system, greatly reduces the required investments needed in scarce design
resources and helps customers focus on building a position and responding quickly to the market demand
` Secondly, an advantage of the reference design approach is that the system consisting of complex functions realized in silicon and software can be validated in tangible results
` Thirdly, to create a stable platform from which  customized solutions can be derived faster.

OM5730 is expected that in the coming years the market will grow in all segments, satellite, cable and terrestrial; and that the captive broadcasters gradually open up their system, focusing more on the services rather then the contents of the box. Their service role at the beginning is to create the market by having box content, then OM5730 will change towards the real core service activities bringing content and new services to the home.

This changing behaviour of the service providers calls for the semiconductor providers to offer competitive solutions,
enabling the future dreams of the service providers. This implies that in order to plan the evolution of the set-top box
functionality, one must be positioned and in control of the whole system.

2.3 Benefits

2.3.1 KEY SYSTEM BENEFITS

` OM5730 offers a good compromise between flexibility, performance and integration of functions which leads to a very attractive price/performance offer.
` The OM5730 performs the descrambling, demultiplexing and control of the STB while the SAA7215 family performs the media processing functions such as MPEG2 audio video and graphics processing. The communication between the two ICs as well as the memory partitioning and management have been designed so that a true unified memory oncept can be implemented with no performance degradation.
` Within the STB family of products, HW and SW footprints will be maintained to ensure the maximum possible reuse of resources.
` Philips offering the most comprehensive portfolio of ICs combined with our well known technological capabilities
brings the best on a complete system level. This in combination with our local technical support centres gives the customer a fast and secure inroad to the new field of emerging technology.

2.3.2 KEY IC BENEFITS

` OM5730 incorporates a low cost high performance 32 bits MIPS processor with 4 kbytes instruction cache and 1-kbyte data cache. In addition a 4-kbyte second-level cache, designed for SW optimization but can also be used for 'last minute' CPU intensive software patches is offered to software developers, boosting application performance.
` A flexible hardware/software partitioning and optimization for DVB TS demultiplexing has been designed targeted to Canal+ specification. This partitioning makes parsing of incoming stream in hardware, in order to off-load the processor and makes most of the processing from system memory by the MIPS processor, which leaves to software  developers the freedom to allocate the right priority at the application level for MPEG system data handling.
` All required OM5730 system services are covered by the SAA7219, such as full DVB descrambling, section filtering with 32 PIDs handled in hardware and more if required in software, TS/PES filter for maximum flexibility in the service handling and edition (time base discontinuity)` In terms of interfaces, the OM5730 interfaces with basic STB peripherals such as UART, smart card interface, IEEE 1284, but also with the next generation high speed interfaces such as IEEE 1394
` OM5730 is able to control with a high speed clock (40.5 MHz) DRAMs, flash, EEPROM and is able to control the SAA7215 family as a memory mapped device with a maximum sustained rate of 40.5 Mbytes/s, which enables fast graphic update in the second SDRAM
` OM5730 family has a scalable memory architecture: 16 Mbits for low-end and 32 Mbits for mid/high-end pplications; furthermore, there is a full decoupling of MPEG processing and graphics/CPU control buses and control, which offers a high bandwidth and low latency for CPU when accessing the graphics memory ` OM5730 family features 5  ndependent graphics planes that can address all the known digital TV, video and graphics requirements:
Background: where still pictures can be displayed in the background
Foreground: where broadcast graphics and the user interface can be displayed
Video: where still or moving video is displayed
Cursor: implemented in hardware to offer fast responses times.
` Graphics are processed internally in high resolution RGB 4 : 4 : 4 format which provides the best quality in graphics rendering as well as for mixing with video in 4 : 2 : 2 format
` A dedicatedDMU(bit block transfer type) offers very fast  block move and data manipulation during the transfers;
this can be used to perform scaling of graphics, transfers from 4 : 2 : 0 to CLUT or RGB formats, or fast block move in MPEG or graphics SDRAMs
` OM5730 family offers flexible scaling features, including letter box conversion that is now becoming a needed features for broadcasters
` Two independent mixed video/graphics and video-only signal paths are implemented and allow software disabling of the user interface for recording on VCR
` Integrated digital video encoder with Y/C, CVBS and RGB outputs reduce the Bill of Materials (BOM) and also the board space, while still offering the possibility to have access to the YUV digital bus through CCIR 656 interface
` OM5730 family is ready for future audio features such as AC-3 or high fidelity LPCM audio, such as requested by the world-wide DVD standard, but also for high-end STB in the USA. OM5730 family processes LPCM audio data and can interface gluelessly with an external multi-channel audio decoder such as the OM5730, through IEC 958 interface.