Features: · 2.1 MHz clock rate @ 2.7V to 5.5V· 2048 bits organized as 256 x 8· Multiple chips on the same 3-wire bus with separate chip select lines· Self-timed programming cycle· Simultaneous programming of 1 to 4 bytes at a time· Status register can be polled during programming to monitor READY/...
NM25C020: Features: · 2.1 MHz clock rate @ 2.7V to 5.5V· 2048 bits organized as 256 x 8· Multiple chips on the same 3-wire bus with separate chip select lines· Self-timed programming cycle· Simultaneous progr...
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The NM25C020 is a 2048-bit CMOS EEPROM with an SPI compatible serial interface. The NM25C020 is designed for data storage in applications requiring both non-volatile memory and insystem data updates. This EEPROM is well suited for applications using the 68HC11 series of microcontrollers that support the SPI interface for high speed communication with peripheral devices via a serial bus to reduce pin count. The NM25C020 is implemented in Fairchild Semiconductor's floating gate CMOS process that provides superior endurance and data retention.
The serial data transmission of NM25C020 requires four signal lines to control the device operation: Chip Select (CS), Clock (SCK), Data In (SI), and Serial Data Out (SO). All programming cycles are completely self-timed and do not require an erase before WRITE.
BLOCK WRITE protection is provided by programming the STATUS REGISTER with one of four levels of write protection. Additionally, separate WRITE NM25C020 enable and WRITE disable instructions are provided for data protection.
Hardware data protection is provided by the WP pin to protect against inadvertent programming. The HOLD pin of NM25C020 allows the serial communication to be suspended without resetting the serial