Features: • Pb−Free Packages are Available• 0.980 V ±1.0% Reference Voltage• V2 Control Topology• 200 ns Transient Response• Programmable Soft−Start• 40 ns Gate Rise and Fall Times (3.3 nF Load)• Adaptive FET Nonoverlap Time• Default 200 ...
NCP1575: Features: • Pb−Free Packages are Available• 0.980 V ±1.0% Reference Voltage• V2 Control Topology• 200 ns Transient Response• Programmable Soft−Start• ...
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Rating |
Value |
Unit |
Operating Junction Temperature |
150 |
°C |
Storage Temperature Range |
−65 to 150 |
°C |
ESD Susceptibility (Human Body Model) |
2.0 |
kV |
ESD Susceptibility (Charged Device Model) |
200 |
V |
Lead Temperature Soldering:Reflow: (Note 1) |
230 peak |
°C |
Moisture Sensitivity Level |
2 |
|
Package Thermal Resistance, SOIC−8: Junction−to−Case, RJC Junction−to−Ambient, RJA |
48 165 |
°C/W °C/W |
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
1. 60 second maximum above 183°C.
The NCP1575 is a low voltage buck controller. It provides the control for a DC−DC power solution producing an output voltage as low as 0.980 V over a wide current range. It contains all required circuitry for a synchronous NFET buck regulator using the V2TM control method to achieve the fastest possible transient response and best overall regulation. The NCP1575 operates at a default switching frequency of 200 kHz, but switching frequency is user−programmable with an additional resistor between ROSC and ground. This device provides undervoltage lockout protection, soft−start, and built−in adaptive nonoverlap and is assembled in an SOIC−8 package.
The NCP1575−based solution requires a bias supply of 12 V, and it can convert from a bulk power supply ranging from 2 V to 12 V. Conversion from bulk supplies greater than 7 V is best accomplished by using an external doubler circuit to raise the enhancement voltage for the external NFET switches.