Features: • Pb−Free Package is Available*
• Free−Running Borderline/Critical Mode Quasi−Resonant Operation
• Latched Overvoltage Protection
• Auto−Recovery Short−Circuit Protection Via UVLO Crossover
• Current−Mode with Adjustable Skip Cycle Capability
• Internal 1.0 ms Soft−Start
• Internal Temperature Shutdown
• Internal Leading Edge Blanking
• 500 mA Peak Current Source/Sink Capability
• External Latch Triggering, e.g. Via Overtemperature Signal
• Direct Optocoupler Connection
• SPICE Models Available for TRANsient Analysis
• Internal 8.0 s Minimum TOFFApplication• Battery−Based Operations
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
Pinout
Specifications
|
Rating |
Symbol |
Value |
Unit |
| Power Supply Voltage |
VCC, Drv |
16 |
V |
| Maximum Voltage on all other pins except Pin 8 (HV), Pin 6 (VCC) and Pin 5 (Drv) |
− |
−0.3 to 10 |
V |
| Maximum Current into all pins except VCC (6), HV (8) and Demag (1) when 10 V ESDdiodes are activated |
− |
5.0 |
mA |
| Maximum Current in Pin 1 |
Idem |
+3.0/−2.0 |
mA |
| Thermal Resistance, Junction−to−Case |
RJC |
57 |
/W |
| Thermal Resistance, Junction−to−Air, SOIC Version |
RJA |
178 |
/W |
| Thermal Resistance, Junction−to−Air, PDIP Version |
RJA |
100 |
/W |
| Maximum Junction Temperature |
TJMAX |
150 |
|
| Temperature Shutdown |
− |
155 |
|
| Hysteresis in Shutdown |
− |
30 |
|
| Storage Temperature Range |
− |
−60 to +150 |
|
| ESD Capability, HBM Model (All pins except VCC and HV) |
− |
2.0 |
kV |
| ESD Capability, Machine Model |
− |
200 |
V |
| Maximum Voltage on Pin 8 (HV), Pin 6 (VCC) Decoupled to Ground with 10 F |
VHV |
500 |
V |
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
DescriptionThe NCP1378 combines a true current mode modulator and a demagnetization detector to ensure full borderline/critical Conduction Mode in any load/line conditions and minimum drain voltage switching (Quasi−Resonant operation). Due to its inherent skip cycle capability, the controller enters burst mode as soon as the power demand falls below a predetermined level. As this happens at low peak current, no audible noise can be heard. An internal 8.0 s timer prevents the free−run frequency to exceed 100 kHz (therefore below the 150 kHz CISPR−22 EMI starting limit), while the skip adjustment capability lets the user select the frequency at which the burst foldback takes place.
The NCP1378 transformer core reset detection is done through an auxiliary winding which, brought via a dedicated pin, also enables fast Over Voltage Protection (OVP). Once an OVP has been detected, the IC permanently latches off.
The NCP1378 also features an efficient protective circuitry that, in presence of an overcurrent condition, disables the output pulses and enters a safe burst mode, trying to restart. Once the default has gone, the device auto−recovers. Finally an internal 1.0 ms Soft−Start eliminates the traditional startup stress.
The NCP1378 is tailored for low voltage applications having UVLO thresholds of 8.4 V (on) and 7.5 V (off).
NCP1378 Data Sheet
