MX29LV401T

• Status Reply
- Data polling & Toggle bit for detection of program and erase operation completion.
• Ready/Busy pin (RY/BY)
- Provides a hardware method of detecting program or erase operation completion.
• Sector protection
- Hardware method to disable any combination of sectors from program or erase operations
- Tempoary sector unprotect allows code changes in previously locked sectors.
• 100,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Boot Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
• Low VCC write inhibit is equal to or less than 2.3V
• Package type:
- 44-pin SOP
- 48-pin TSOP
- 48-ball CSP
• Compatibility with JEDEC standard
- Pinout and software compatible with single-power supply Flash
• Extended single - supply voltage range 2.7V to 3.6V
• 524,288 x 8/262,144 x 16 switchable
• Single power supply operation
- 3.0V only operation for read, erase and program operation
• Fast access time: 55R/70/90ns
• Low power consumption
- 20mA maximum active current
- 0.2uA typical standby current
• Command register architecture
- Byte/word Programming (9us/11us typical)
- Sector Erase (Sector structure 16K-Byte x 1,8K-Byte x 2, 32K-Byte x1, and 64K-Byte x7)
• Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with Erase Suspend capability.
- Automatically program and verify data at specified address
• Erase suspend/Erase Resume
- Suspends sector erase operation to read data from,or program data to, any  sector that is not being erased,then resumes the erase.

Storage Temperature
Plastic Packages . . . . . . . . . . . . . ..... -65 to +150

Ambient Temperature
with Power Applied. . . . . . . . . . . . . ...-65 to +125
Voltage with Respect to Ground
VCC (Note 1) . . . . . . . . . . . . . . . . .    -0.5 V to +4.0 V
A9, OE, and
RESET (Note 2) . . . . . . . . . . . ....      -0.5 V to +12.5 V
All other pins (Note 1) . . . . . . .   -0.5 V to VCC +0.5 V
Output Short Circuit Current (Note 3) . . . . . .  200 mA
Notes:
1. Minimum DC voltage on input or I/O pins is -0.5 V.During voltage transitions, input or I/O pins may over-shoot VSS to -2.0 V for periods of up to 20 ns. See Figure 6. Maximum DC voltage on input or I/O pins is VCC +0.5 V. During voltage transitions, input or I/O pins may overshoot to VCC +2.0 V for periods up to 20 ns.

2. Minimum DC input voltage on pins A9, OE, and RESET is -0.5 V. During voltage transitions, A9, OE,and RESET may overshoot VSS to -2.0 V for periods of up to 20 ns. See Figure 6. Maximum DC input volt-age on pin A9 is +12.5 V which may overshoot to 14.0 V for periods up to 20 ns.

3. No more than one output may be shorted to ground at a time. Duration of the short circuit should not be greater than one second. Stresses above those listed under "Absolute Maximum Rat-ings" may cause permanent damage to the device.This is a stress rating only; functional operation of the device at these or any other conditions above those in-dicated in the operational sections of this data sheet is not implied. Exposure of the device to absolute maxi-mum rating conditions for extended periods may affect device reliability.

The MX29LV401T/B is a 4-mega bit Flash memory or-ganized as 512K bytes of 8 bits or 256K words of 16 bits.  MXIC's Flash memories offer the most cost-effec-tive and reliable read/write non-volatile random access memory.  The MX29LV401T/B is packaged in 44-pin SOP, 48-pin TSOP and 48-ball CSP.  It is designed to be reprogrammed and erased in system or in standard EPROM programmers.

The standard MX29LV401T/B offers access time as fast as 55ns, allowing operation of high-speed microproces-sors without wait states.  To eliminate bus contention,the MX29LV401T/B has separate chip enable (CE) and output enable (OE) controls.

MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming.  The MX29LV401T/B uses a command register to manage this functionality.  The command register allows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maxi-mum EPROM compatibility.

MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles.  The MXIC cell is designed to optimize the erase and programming mechanisms.  In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and program operations produces reliable cy-cling.  The MX29LV401T/B uses a 2.7V~3.6V VCC sup-ply to perform the High Reliability Erase and auto Pro-gram/Erase algorithms.

The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process.  Latch-up pro-tection is proved for stresses up to 100 milliamps on address and data pin from -1V to VCC + 1V.