MX29F400B

Features: • 524,288 x 8/262,144 x 16 switchable• Single power supply operation - 5.0V only operation for read, erase and program operation• Fast access time: 55/70/90/120ns• Low power consumption - 40mA maximum active current(5MHz) - 1uA typical standby current• Comma...

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MX29F400B Picture
SeekIC No. : 004431723 Detail

MX29F400B: Features: • 524,288 x 8/262,144 x 16 switchable• Single power supply operation - 5.0V only operation for read, erase and program operation• Fast access time: 55/70/90/120ns• ...

floor Price/Ceiling Price

Part Number:
MX29F400B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

• 524,288 x 8/262,144 x 16 switchable
• Single power supply operation
   - 5.0V only operation for read, erase and program operation
• Fast access time: 55/70/90/120ns
• Low power consumption
   - 40mA maximum active current(5MHz)
   - 1uA typical standby current
• Command register architecture
   - Byte/word Programming (7us/12us typical)
   - Sector Erase (Sector structure 16K-Bytex1, 8K-Bytex2, 32K-Bytex1, and 64K-Byte x7)
• Auto Erase (chip & sector) and Auto Program
   - Automatically erase any combination of sectors with Erase Suspend capability.
   - Automatically program and verify data at specified address
• Erase suspend/Erase Resume
   - Suspends an erase operation to read data from, orprogram data to, another sector that is not being erased, then resumes the erase.
• Status Reply
   - Data polling & Toggle bit for detection of program and erase cycle completion.
• Ready/ Busy pin (RY/ BY)
   - Provides a hardware method of detecting program or erase cycle completion.
   - Sector protect/unprotect for 5V only system or 5V/12V system.
• Sector protection
   - Hardware method to disable any combination of sectors from program or erase operations
• 100,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Boot Code Sector Architecture
   - T = Top Boot Sector
   - B = Bottom Boot Sector
• Low VCC write inhibit is equal to or less than 3.2V
• Package type:
   - 44-pin SOP
   - 48-pin TSOP
• Compatibility with JEDEC standard
   - Pinout and software compatible with single-power supply Flash
• 20 years data retention



Pinout

  Connection Diagram


Specifications

RATING
VALUE
Ambient Operating Temperature
-40 to 125
Ambient Temperature with Power
Applied
-55 to 125
Storage Temperature
-65 to 125
Applied Input Voltage
-0.5V to 7.0V
Applied Output Voltage
-0.5V to 7.0V
VCC to Ground Potential
-0.5V to 7.0V
A9 & OE
-0.5V to 13.5V



Description

The MX29F400T/MX29F400B is a 4-mega bit Flash memory orga-nized as 512K bytes of 8 bits or 256K words of 16 bits.MXIC's Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory.  The MX29F400T/B is packaged in 44-pin SOP,48-pin TSOP.  It is designed to be reprogrammed and erased in system or in standard EPROM programmers.

The standard MX29F400T/MX29F400B offers access time as fast as 55ns, allowing operation of high-speed microproces-sors without wait states.  To eliminate bus contention,the MX29F400T/B has separate chip enable (CE) and output enable (OE) controls.

MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming.  The MX29F400T/MX29F400B uses a command register to manage this functionality.  The command register allows for 100%TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maxi-mum EPROM compatibility.

MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles.  The MXIC cell is designed to optimize the erase and programming mechanisms.  In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and program operations produces reliable cy-cling.  The MX29F400T/MX29F400B uses a 5.0V±10% VCC sup-ply to perform the High Reliability Erase and auto Pro-gram/Erase algorithms.

The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process.  Latch-up pro-tection is proved for stresses up to 100 milliamps on address and data pin from -1V to VCC + 1V.



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