MX29F200CT

Features: • 5.0V±10% for read, erase and write operation• 131072x16/262144x8 switchable• Fast access time: 55/70/90ns• Compatible with MX29F200T/B device• Low power consumption- 40mA maximum active current@5MHz- 1uA typical standby current• Command register arch...

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SeekIC No. : 004431721 Detail

MX29F200CT: Features: • 5.0V±10% for read, erase and write operation• 131072x16/262144x8 switchable• Fast access time: 55/70/90ns• Compatible with MX29F200T/B device• Low power con...

floor Price/Ceiling Price

Part Number:
MX29F200CT
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

• 5.0V±10% for read, erase and write operation
• 131072x16/262144x8 switchable
• Fast access time: 55/70/90ns
• Compatible with MX29F200T/B device
• Low power consumption
- 40mA maximum active current@5MHz
- 1uA typical standby current
• Command register architecture
- Byte/Word Programming (9us/11us typical)
- Sector Erase (16K-Bytex1, 8K-Bytex2, 32K-Bytex1, and 64K-Byte x3)
• Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors or the whole chip with Erase Suspend capability.
- Automatically program and verify data at specified address
• Status Reply
- Data# Polling & Toggle bit for detection of program and erase cycle completion.
• Ready/Busy# pin(RY/BY#)
- Provides a hardware method or detecting program or erase cycle completion
• Compatibility with JEDEC standard
- Pinout and software compatible with single-power supply Flash
- Superior inadvertent write protection
• Sector protection
- Hardware method to disable any combination of sectors from program or erase operations
- Temporary sector unprotect allows code changes in previously locked sectors
• Sector protect/chip unprotect for 5V only system
• 100,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Boot Code Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
• Low VCC write inhibit is equal to or less than 3.2V
• Erase suspend/ Erase Resume
- Suspends an erase operation to read data from, or program data to a sector that is not being erased, then resume the erase operation.
• Hardware reset pin
- Resets internal state mechine to the read mode
• 20 years data retention
• Package type:
- 44-pin SOP
- 48-pin TSOP
- All Pb-free devices are RoHS Compliant




Pinout

  Connection Diagram

  Connection Diagram




Specifications

Drain Bias Voltage (Vdd1, 2, 3, 4, 5) +8 Vdc
Gate Bias Voltage (Vgg) -2.0 to 0 Vdc
RF Input Power (RFin)(Vdd = +7.0 Vdc) +20 dBm
Channel Temperature 150
Continuous Pdiss (T = 85 )
(derate 11.6 mW/above 85 )
10 W
Thermal Resistance
(channel to ground paddle)
6.5 /W
Storage Temperature -65 to +150
Operating Temperature -40 to +85


NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended period may affect reliability.

NOTICE:
Specifications contained within the following tables are subject to change.




Description

The MX29F200C T/MX29F200CT is a 2-mega bit, single 5 Volt Flash memory organized as 1M word x16 or 2M bytex8 MXIC's Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory. The MX29F200C T/B is packaged in 44-pin SOP and 48- pin TSOP. It is designed to be reprogrammed and erased in-system or in-standard EPROM programmers.

The standard MX29F200C T/MX29F200CT offers access time as fast as 55ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX29F200C T/B has separate chip enable (CE#) and output enable (OE# ) controls.

MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX29F200C T/MX29F200CT uses a  ommand register to manage this functionality. The command register allows for 100%TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility.

MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles. The MXIC cell is designed to  optimize the erase and programming mechanisms. In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and programming operations produces reliable cycling. The MX29F200C T/MX29F200CT uses a 5.0V ± 10% VCC supply to perform the High Reliability Erase and auto Program/Erase algorithms.

The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up protection is proved for stresses up to 100 milliamps on address and data pin from -1V to VCC + 1V.

 




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